參數(shù)資料
型號(hào): NCN8024RDWR2G
廠商: ON Semiconductor
文件頁(yè)數(shù): 9/15頁(yè)
文件大?。?/td> 0K
描述: IC SMART CARD IC2 28SOIC
標(biāo)準(zhǔn)包裝: 1,000
系列: *
NCN8024R
http://onsemi.com
3
23
3
19
18
1
2
24
25
26
28
27
20
22
9
10
21
6
CLKDIV1
CLKDIV2
GNDP
VDDP
CRD_I/O
CRD_AUX2
CRD_AUX1
CMDVCC
AUX2uc
AUX1uc
I/Ouc
CLKIN
GND
VDD
RSTIN
PORADJ
CRD_VCC
CRD_RST
CRD_CLK
INT
5V/3V
CRD_PRES
NC
CRD_PRES
Interrupt Block
Card Detection
3.0 V / 5.0 V LDO
Supply Voltage
Monitoring
Clock Dividers
Control Logic
and Sequencer
Card Pin
Drivers
Thermal Control
Figure 3. NCN8024R Block Diagram
17
14
4
15
16
11
13
12
CRD_GND
PIN FUNCTION AND DESCRIPTION
Pin #
Name
Type
Description
1
CLKDIV1
Input
This pin coupled with CLKDIV2 is used to program the clock frequency division ratio (Table 1).
2
CLKDIV2
Input
This pin coupled with CLKDIV1 is used to program the clock frequency division ratio (Table 1).
3
5V/3V
Input
Allows selecting card VCC power supply voltage. CRD_VCC = 5 V when 5V/3V = HIGH or 3 V when
5V/3V = LOW
4
GNDP
GND
Regulator Power Supply Ground
5
NC
Not Connected
6
VDDP
Power
Regulator Power Supply
7
NC
Not Connected
8
NC
Not Connected
9
CRD_PRES
Input
Card presence pin active (card present) when CRD_PRES = Low. A builtin debounce timer of
about 8 ms is activated when a card is inserted. Convenient for Normally Open (NO) smart card
connector.
10
CRD_PRES
Input
Card presence pin active (card present) when CRD_PRES = High. A builtin debounce timer of
about 8 ms is activated when a card is inserted. Convenient for Normally Closed (NC) smart card
connector.
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