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參數(shù)資料
| 型號： | NCN8024RDWR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SMART CARD IC2 28SOIC |
| 標準包裝： | 1,000 |
| 系列： | * |
NCN8024R
http://onsemi.com
4
PIN FUNCTION AND DESCRIPTION
Pin #
Description
Type
Name
11
CRD_I/O
Input/
Output
This pin handles the connection to the serial I/O (C7) of the card connector. A bidirectional level
translator adapts the serial I/O signal between the card and the micro controller. An 11 kW (typical)
pullup resistor to CRD_VCC provides a High impedance state for the smart card I/O link.
12
CRD_AUX2
Input/
Output
This pin handles the connection to the chip card’s serial auxiliary AUX2 I/O pin (C8). A bidirectional
level translator adapts the serial I/O signal between the card and the micro controller. An 11 kW
(typical) pullup resistor to CRD_VCC provides a High impedance state for the smart card C8 pin.
13
CRD_AUX1
Input/
Output
This pin handles the connection to the chip card’s serial auxiliary AUX1 I/O pin (C4). A bidirectional
level translator adapts the serial I/O signal between the card and the micro controller. An 11 kW
(typical) pullup resistor to CRD_VCC provides a High impedance state for the smart card C4 pin.
14
CRD_GND
GND
Card Ground
15
CRD_CLK
Output
This pin is connected to the CLOCK card connector’s pin (Chip card’s pin C3). The Clock signal
comes from the CLKIN input through clock dividers and level shifter.
16
CRD_RST
Output
This pin is connected to the chip card’s RESET pin (C2) through the card connector. A level
translator adapts the external Reset (RSTIN) signal to the smart card.
17
CRD_VCC
Power
This pin is connected to the smart card power supply pin. An internal DC/DC converter is
programmable using the pin 5V/3V to supply either 5 V or 3 V output voltage. An external distributed
ceramic capacitor ranging from 80 nF to 1.2 mF recommended must be connected across
CRD_VCC and CRD_GND. This set of capacitor must be low ESR (< 100 mW).
18
PORADJ
Input
Poweron reset threshold adjustment input pin for changing the reset threshold with an external
resistor power divider. Recommended to be connected to ground when unused.
19
CMDVCC
Input
Command VCC pin. Activation sequence Enable/Disable pin (active Low). The activation sequence is
enabled by toggling CMDVCC High to Low and when a card is present.
20
RSTIN
Input
This Reset input connected to the host and referred to VDD (microcontroller side), is connected to
the smart card Reset pin through the internal level shifter which translates the level according to the
CRD_VCC programmed value.
21
VDD
Power
This pin is connected to the system controller power supply. It configures the level shifter input
stage to accept the signals coming from the controller. A 0.1 mF capacitor shall be used to bypass
the power supply voltage. When VDD is below 2.30 V typical the card pins are disabled.
22
GND
Ground
23
INT
Output
The interrupt request is activated LOW on this pin. This is enabled when a card is present and the
card presence is detected by CRD_PRES or CRD_PRES pins. Similarly an interrupt is generated
when CRD_VCC is overloaded. 20 kW typical integrated pullup resistor to VDD.
24
CLKIN
Input
Clock Input for External Clock
25
NC
Not Connected
26
I/Ouc
Input/
Output
This pin is connected to an external microcontroller. A bidirectional level translator adapts the
serial I/O signal between the smart card and the external controller. A builtin constant 11 kW
(typical) resistor provides a high impedance state.
27
AUX1uc
Input/
Output
This pin is connected to an external microcontroller. A bidirectional level translator adapts the
serial C4 signal between the smart card and the external controller. A builtin constant 11 kW
(typical) resistor provides a high impedance state.
28
AUX2uc
Input/
Output
This pin is connected to an external microcontroller. A bidirectional level translator adapts the
serial C8 signal between the smart card and the external controller. A builtin constant 11 kW
(typical) resistor provides a high impedance state.
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