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參數(shù)資料
| 型號(hào)： | NCN2612MTTWG |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX 1CHAN USB 56WQFN |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 功能： | 開(kāi)關(guān) |
| 電路： | 6 x 1:2 |
| 導(dǎo)通狀態(tài)電阻： | 13 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 3.6 V |
| 電流 - 電源： | 250µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 56-WFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 56-WQFN |
| 包裝： | 帶卷 (TR) |
NCN2612
http://onsemi.com
4
PIN FUNCTION AND DESCRIPTION
Pin
Name
Description
6, 17, 22, 27,
34,50, 55
VDD
DC Supply, 3.3 V $10%
1, 11, 16, 20, 21,
28, 29, 35, 48,
49, 56
GND
Power Ground.
Exposed Pad
The exposed pad on the backside of package is internally connected to Gnd. Externally the exposed
pad should also be userconnected to GND.
2
IN_0+
Differential input from GMCH PCIE outputs. IN_0+ makes a differential pair with IN_0.
3
IN_0
Differential input from GMCH PCIE outputs. IN_0 makes a differential pair with IN_0+.
4
IN_1+
Differential input from GMCH PCIE outputs. IN_1+ makes a differential pair with IN_1.
5
IN_1
Differential input from GMCH PCIE outputs. IN_1 makes a differential pair with IN_1+.
7
IN_2+
Differential input from GMCH PCIE outputs. IN_2+ makes a differential pair with IN_2.
8
IN_2
Differential input from GMCH PCIE outputs. IN_2 makes a differential pair with IN_2+.
9
IN_3+
Differential input from GMCH PCIE outputs. IN_3+ makes a differential pair with IN_3.
10
IN_3
Differential input from GMCH PCIE outputs. IN_3 makes a differential pair with IN_3+.
12
OUT+
Passthrough output from AUX+ input when SEL = 1. Passthrough output from Rx0+ input when
SEL = 0.
13
OUT
Passthrough output from AUX input when SEL = 1. Passthrough output from Rx0 input when
SEL = 0.
14
X+
X+ is an analog passthrough output corresponding to Rx1+.
15
X
X is an analog passthrough output corresponding to the Rx1 input. The path
from Rx1 to X must be matched with the path from Rx1+ to X+. X+ and X form a
differential pair when the passthrough mux mode is selected.
18
SEL
SEL controls the mux through a flowthrough latch.
SEL = 0 for PCIE Mode; SEL = 1 for DP Mode
19
LE
The latch gate is controlled by LE.
43, 42
D0+, D0
Analog passthrough output#1 corresponding to IN_0+ and IN_0, when SEL = 1.
41, 40
D1+, D1
Analog passthrough output#1 corresponding to IN_1+ and IN_1, when SEL = 1.
39, 38
D2+, D2
Analog passthrough output#1 corresponding to IN_2+ and IN_2, when SEL = 1.
37, 36
D3+, D3
Analog passthrough output#1 corresponding to IN_3+ and IN_3, when SEL = 1.
54, 53
Tx0+, Tx0
Analog passthrough output#2 corresponding to IN_0+ and IN_0 when SEL = 0.
52, 51
Tx1+, Tx1
Analog passthrough output#2 corresponding to IN_1+ and IN_1 when SEL = 0.
47, 46
Tx2+, Tx2
Analog passthrough output#2 corresponding to IN_2+ and IN_2 when SEL = 0.
45, 44
Tx3+, Tx3
Analog passthrough output#2 corresponding to IN_3+ and IN_3 when SEL = 0.
26
AUX+
Differential input from HDMI/DP connector. AUX+ makes a differential
pair with AUX. AUX+ is passed through to the OUT+ pin when SEL = 1.
25
AUX
Differential input from HDMI/DP connector. AUX makes a differential
pair with AUX+. AUX is passed through to the OUT pin when SEL = 1.
24
HPD1
Positive low frequency HPD input handshake protocol signal.
23
HPD2
Negative low frequency HPD input handshake protocol signal (normally not connected).
33
Rx0+
Differential input from PCIE connector or device. Rx0+ makes a differential pair with Rx0. Rx0+ is
passed through to the OUT+ pin when SEL = 0.
32
Rx0
Differential input from PCIE connector or device. Rx0 makes a differential pair with Rx0+. Rx0 is
passed through to the OUT pin when SEL = 0.
31
Rx1+
Differential input from PCIE connector or device. Rx1+ makes a differential pair with Rx1. Rx1+ is
passed through to the X+ pin when SEL = 0.
30
Rx1
Differential input from PCIE connector or device. Rx1 makes a differential pair with Rx1+. Rx1 is
passed through to the X pin on the path that matches the Rx1+ to X+ pin.
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