參數(shù)資料
型號: NAND512R4A2CN6F
廠商: 意法半導(dǎo)體
英文描述: 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
中文描述: 512兆位,528 Byte/264字的頁面,1.8V/3V,NAND閃存芯片
文件頁數(shù): 41/51頁
文件大小: 517K
代理商: NAND512R4A2CN6F
DC and AC parameters
NAND512-A2C
46/51
Figure 30.
Resistor value versus waveform timings for Ready/Busy signal
1.
T = 25°C.
10.2
Data Protection
The ST NAND device is designed to guarantee Data Protection during Power Transitions.
A VDD detection circuit disables all NAND operations, if VDD is below the VLKO threshold.
In the VDD range from VLKO to the lower limit of nominal range, the WP pin should be kept
low (VIL) to guarantee hardware protection during power transitions as shown in the below
figure.
Figure 31.
Data Protection
ai07565B
RP (K)
12
3
4
100
300
200
t r
,t
f
(ns)
1
2
3
1.7
0.85
30
1.7
tr
tf
ibusy
0
400
4
RP (K)
12
3
4
100
300
200
1
2
3
ibusy
(mA)
2.4
1.2
0.8
0.6
100
200
300
400
3.6
0
400
4
VDD = 1.8V, CL = 30pF
VDD = 3.3V, CL = 100pF
t r
,t
f
(ns)
ibusy
(mA)
60
90
120
0.57
0.43
Ai13188
VLKO
VDD
WP
Nominal Range
Locked
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