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參數(shù)資料
| 型號(hào)： | MXL1344ACAG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CABLE TERM MP 24-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | 纜線 |
| 端子數(shù)： | 6 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
Detailed Description
The MXL1344A contains six software-selectable multi-
protocol cable termination networks (Figure 3). Each
network is capable of terminating V.11 (RS-422, RS-
530, RS-530A, RS-449, V.36 and X.21) with a 100
dif-
ferential load, V.35 with a T-network load, or V.28
(RS-232) and V.10 (RS-423) with an open-circuit load
for use with transceivers having on-chip termination.
The termination protocol can be selected by the serial
interface cable wiring or by software control. The
MXL1344A replaces discrete resistor termination net-
works and expensive relays required for multiprotocol
termination, saving space and cost.
The MXL1344A terminator is designed to form a com-
plete +5V cable- or software-selectable multiprotocol
DTE/DCE interface port when used with the MXL1543
and MXL1544/MAX3175 transceivers. The MXL1344A
terminator can use the VEE power generated by the
MXL1543 charge pump, simplifying system design. The
MXL1344A, MXL1543, and MXL1544/MAX3175 are pin-
for-pin compatible with the LTC1344A, LTC1543, and
LTC1544, but for proper operation, the entire Maxim
MXL1344A
+5V Multiprotocol, Software-Selectable
Cable Terminator
4
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
M0
Mode-Select Pin (Table 1)
2VEE
Negative Supply Voltage (typically connected to VEE of MXL1543*). Bypass to GND with a 0.1
F
capacitor.
3
R1C
Load 1, Center Tap
4
R1B
Load 1, Node B
5
R1A
Load 1, Node A
6
R2A
Load 2, Node A
7
R2B
Load 2, Node B
8
R2C
Load 2, Center Tap
9
R3A
Load 3, Node A
10
R3B
Load 3, Node B
11
R3C
Load 3, Center Tap
12, 13
GND
Ground
14
VCC
+5V Supply Voltage. Bypass to GND with a 0.1
F capacitor.
15
R4B
Load 4, Node B
16
R4A
Load 4, Node A
17
R5B
Load 5, Node B
18
R5A
Load 5, Node A
19
R6A
Load 6, Node A
20
R6B
Load 6, Node B
21
LATCH
Latch Signal Input. When LATCH is LOW, the input latches are transparent. When LATCH is high, the
data at the mode-select inputs are latched.
22
DCE/ DTE
Logic Level HIGH selects DCE interface, (Table 1)
23
M2
Mode-Select Pin (Table 1)
24
M1
Mode-Select Pin (Table 1)
*VEE is typically supplied by the charge pump of the MXL1543. The VEE input level varies with the mode of chipset operation
as follows:
V.35/V.28 Modes: -6.50V
≤ VEE ≤ -5.45V, in typical operation VEE = -5.80V
V.10/V.11 Modes: -4.60V
≤ VEE ≤ -3.80V, in typical operation VEE = -4.20V
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