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參數(shù)資料
| 型號： | MXL1344ACAG+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CABLE TERM MP 24-SSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 類型： | 纜線 |
| 端子數(shù)： | 6 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
MXL1344A
+5V Multiprotocol, Software-Selectable
Cable Terminator
8
_______________________________________________________________________________________
No-Cable Mode
The MXL1344A enters no-cable mode when the mode
select inputs, M0, M1, and M2 are connected HIGH or
left unconnected. In no-cable mode, all six termination
networks are placed in V.11 mode, with S1 closed and
S2 open (Figure 4).
Applications Information
Older multiprotocol interface termination circuits have
been constructed using expensive relays with discrete
resistors, custom cables with built-in termination, or
complex circuit-board configurations to route signals to
the correct termination. The MXL1344A provides a sim-
ple solution to this termination problem. All required ter-
mination configurations are easily cable- or software-
selectable using the four mode-control input pins M0,
M1, M2, and DCE/DTE.
Using the MXL1344A in a Multiprotocol
Serial Interface
The MXL1344A terminator is designed to form a com-
plete +5V cable- or software-selectable multiprotocol
DCE/DTE interface port when used with the MXL1543
and MXL1544/MAX3175 differential driver/receivers.
The MXL1344A terminator is designed to use the VEE
power generated by the MXL1543’s charge pump and
will meet all data sheet specifications when connected
as illustrated in Figure 5. The mode-selection tables of
all three devices are identical, allowing the M0, M1, M2,
and DCE/DTE pins of each device to be connected to a
single 4-wire control bus. The MXL1543 and MXL1544/
MAX3175 provide internal pullups for the four lines,
forcing them to the logic high state if they are not
grounded. This allows interface-mode configuration by
simply strapping the appropriate pins to ground in the
interconnect cable.
In Figure 5, M1, M2 and DCE/DTE are shorted to the
cable ground, forcing logic LOW on these control lines.
Input M0 is left floating and will be pulled HIGH by
internal pullups on the MXL1543 and MXL1544/
100
MIN
A
′
B
′
C
′
A
B
C
GENERATOR
BALANCED
INTERCONNECTING
CABLE
TERMINATION
RECEIVER
LOAD
Figure 6. Typical V.11 Interface
R6
10k
R8
5k
R3
127
R2
52
R1
52
A
′
B
′
C
′
A
B
GND
R5
30k
R7
10k
R4
30k
MXL1344A
MXL1543
S3
S2
S1
RECEIVER
Figure 7. V.11 Termination and Internal Resistance Networks
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