參數(shù)資料
型號： MVTX2602AG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 網(wǎng)絡接口
英文描述： Managed 24 Port 10/100 Mbps Ethernet Switch
中文描述： DATACOM, LAN SWITCHING CIRCUIT, PBGA553
封裝： 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-553
文件頁數(shù)： 19/147頁
文件大?。?/td> 924K
代理商： MVTX2602AG
MVTX2602
Data Sheet
19
Zarlink Semiconductor Inc.
The Transmission DMA (TxDMA) is responsible for multiplexing the data and the address. On a port’s turn, the
TxDMA will move 8 bytes (or up to the EOF) from memory into the port’s associated TxFIFO. After reading the
EOF the port control requests a FCB release for that frame. The TxDMA arbitrates among multiple buffer release
requests.
The frame is transmitted from the TxFIFO to the line.
3.2 Multicast Data Frame Forwarding
After receiving the switch response the TxQ manager has to make the dropping decision. A global decision to drop
can be made based on global FDB utilization and reservations. If so, then the FCB is released and the frame is
dropped. In addition, a selective decision to drop can be made based on the TxQ occupancy at some subset of
the multicast packet’s destinations. If so, then the frame is dropped at some destinations but not others and the
FCB is not released.
If the frame is not dropped at a particular destination port then the TxQ manager formats an entry in the multicast
queue for that port and class. Multicast queues are physical queues (unlike the linked lists for unicast frames).
There are 2 multicast queues for each of the 24 10/100 ports. The queue with higher priority has room for 32
entries and the queue with lower priority has room for 64 entries. There is one multicast queue for every two
priority classes. For the 10/100 ports to map the 8 transmit priorities into 2 multicast queues the 2 LSB are
discarded.
During scheduling, the TxQ manager treats the unicast queue and the multicast queue of the same class as one
logical queue. The older head of line of the two queues is forwarded first.
The port control requests a FCB release only after the EOF for the multicast frame has been read by all ports to
which the frame is destined.
3.3 Frame Forwarding To and From CPU
Frame forwarding from the CPU port to a regular transmission port is nearly the same as forwarding between
transmission ports. The only difference is that the physical destination port must be indicated in addition to the
destination MAC address.
Frame forwarding to the CPU port is nearly the same as forwarding to a regular transmission port. The only
difference is in frame scheduling. Instead of using the patent-pending Zarlink Semiconductor scheduling
algorithms, scheduling for the CPU port is simply based on strict priority. That is, a frame in a high priority queue
will always be transmitted before a frame in a lower priority queue. There are four output queues to the CPU and
one receive queue.
4.0 Memory Interface
4.1 Overview
The MVTX2602 provides a 64-bit-wide SRAM bank. Each DMA can read and write from the SRAM bank. The
following figure provides an overview of the MVTX2602 SRAM bank.
相關(guān)PDF資料
PDF描述
MVTX2603 Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603AG Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2604 Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
MVTX2604AG Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
MVTX2801 Unmanaged 4-Port 1000 Mbps Ethernet Switch
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MVTX2602AG2 制造商:Microsemi Corporation 功能描述:
MVTX2603 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Unmanaged 24 port 10/100Mb + 2 port 1Gb Ethernet switch
MVTX2603AG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch
MVTX2603AG2 制造商:Microsemi Corporation 功能描述:
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