參數資料
型號: MT93L04AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數字傳輸電路
英文描述: 128-Channel Voice Echo Canceller
中文描述: DATACOM, ISDN ECHO CANCELLER, PBGA365
封裝: 27 X 27 MM, 2.33 MM HEIGHT, MS-034, BGA-365
文件頁數: 23/56頁
文件大?。?/td> 903K
代理商: MT93L04AG
MT93L04
Data Sheet
23
Zarlink Semiconductor Inc.
Figure 4 - Echo Canceller Functional Block Diagram
Adaptive Filter
The adaptive filter adapts to the echo path and generates an estimate of the echo signal. This echo estimate is then
subtracted from Sin. For each group of echo cancellers, the adaptive filter is a 1024 tap FIR adaptive filter which is
divided into two sections. Each section contains 512 taps providing 64 ms of echo estimation. In Normal
configuration, the first section is dedicated to channel A and the second section to channel B. In Extended Delay
configuration, both sections are cascaded to provide 128ms of echo estimation in channel A. In Back-to Back
configuration, the first section is used in the receive direction and the second section is used in the transmit
direction for the same channel.
Double-Talk Detector
Double-Talk is defined as those periods of time when signal energy is present in both directions simultaneously.
When this happens, it is necessary to disable the filter adaptation to prevent divergence of the Adaptive Filter
coefficients. Note that when double-talk is detected, the adaptation process is halted but the echo canceller
continues to cancel echo using the previous converged echo profile.
A double-talk condition exists whenever the relative signal levels of Rin (Lrin) and Sin (Lsin) meet the following
condition:
Lsin > Lrin + 20log10(DTDT)
where DTDT is the Double-Talk Detection Threshold.
Lsin and Lrin are signal levels expressed in dBm0.
A different method is used when it is uncertain whether Sin consists of a low level double-talk signal or an echo
return. During these periods, the adaptation process is slowed down but it is not halted.
Linear/
m/A-Law
+
Non-Linear
Processor
Offset
Null
m/A-Law/
Linear
Linear/
m/A-Law
Interface
Double-Talk
Detector
Disable Tone
Detector
C
Narrow-Band
Detector
m/A-Law/
Linear
Offset
Null
Echo Canceller (N), where 0
N
31
Sout
(channel N)
Rin
Sin
Rout
(channel N)
-
Programmable
Bypass
Disable Tone
Detector
(channel N)
(channel N)
ST-BUS
PORT1
ST-BUS
PORT2
12dB
Attenuator
MuteR
MuteS
Instability
Detector
Path Change
Detector
A
F
Microprocessor
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