參數(shù)資料
型號: MT9196ASR1
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Integrated Digital Phone Circuit (IDPC)
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO28
封裝: 0.300 INCH, LEAD FREE, MS-013AE, SOIC-28
文件頁數(shù): 37/46頁
文件大?。?/td> 631K
代理商: MT9196ASR1
MT9196
Data Sheet
37
Zarlink Semiconductor Inc.
Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* Note: RxINC, refer to Control Register 2, address 0Fh.
Electrical Characteristics
for Analog Inputs
Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* Note: TxINC and A/
μ
and refer to Control Register 2, address 0Fh.
Electrical Characteristics
for Analog Outputs
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
Earpiece load impedance
E
ZL
E
CL
260
300
ohms
across HSPKR
±
2
Allowable Earpiece capacitive
load
300
pF
each pin:
HSPKR+,
HSPKR-
3
Earpiece harmonic distortion
E
D
0.5
%
300 ohms load across
HSPKR
±
(tol-15%),
VO
693mV
RMS
, RxINC=1*,
Rx gain=0dB
4
Speaker load impedance
S
ZL
S
CL
34
40
ohms
across SPKR
±
5
Allowable Speaker capacitive
load
300
pF
each pin
SPKR+,
SPKR-
6
Speaker harmonic distortion
S
D
0.5
%
40 ohms load across SPKR
±
(tol-15%),
VO
6.2Vp-p, Rx gain=0dB
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
Input voltage without overloading
CODEC
at MIC+
at AUXin
across M+/M-
V
IOLM
V
IOLA
V
IOLH
1.63
0.580
1.63
0.580
2.90
1.03
Vp-p
Vp-p
Vp-p
Vp-p
Vp-p
Vp-p
TxINC = 0, A/
μ
= 0*
TxINC = 1, A/
μ
= 1*
TxINC = 1, A/
μ
= 0*
TxINC = 1, A/
μ
= 1*
TxINC = 0, A/
μ
= 0*
TxINC = 1, A/
μ
= 1*
Tx filter gain=0dB setting
M+/M-, MIC+
AUXin
to V
SS
2
Input impedance
Z
I
Z
IA
50
10
k
k
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