參數(shù)資料
型號(hào): MT90869
廠商: Zarlink Semiconductor Inc.
英文描述: Flexible 16K Digital Switch (F16kDX)
中文描述: 靈活的16K的數(shù)字交換機(jī)(F16kDX)
文件頁(yè)數(shù): 31/76頁(yè)
文件大?。?/td> 1316K
代理商: MT90869
Data Sheet
MT90869
31
Zarlink Semiconductor Inc.
6.0
Connection Memory Description
The MT90869 incorporates two connection memories, Local Connection Memory and Backplane Connection
Memory.
6.1
Local Connection Memory
The Local Connection Memory (LCM) is 16-bit wide with 8,192 memory locations to support the Local output port.
The most significant bit of each word, bit [15], selects the source stream from either the Backplane or the Local port
and determines the Backplane-to-Local or Local-to-Local data routing. Bits [14:13] select the control modes of the
Local output streams, namely the per-channel message and the per-channel high impedance output control modes.
In Connection Mode (Bit14 = LOW), Bits [12:0] select the source stream and channel number as detailed in
Table
5
. In Message Mode (Bit14 = HIGH), Bits [12:8] are unused and Bits [7:0] contain the message byte to be
transmitted.
The Control Register bits MS2, MS1, and MS0 must be set to 000, respectively, to select the Local Connection
Memory for the Write and Read operations via the microprocessor port. See Section 7.0, Microprocessor Port, and
Section 13.1, Control Register (CR)
for details on microprocessor port access.
Table 5 - Local and Backplane Connection Memory Configuration
6.2
Backplane Connection Memory
The Backplane Connection Memory (BCM) is 16-bit wide with 8,192 memory locations to support the Backplane
output port. The most significant bit of each word, bit [15], selects the source stream from either the Backplane or
the Local port and determines the Local-to-Backplane or Backplane-to-Backplane data routing. Bits [14:13] select
the control modes of the Backplane output streams, namely the per-channel Message Mode and the per-channel
high impedance output control mode. In Connection Mode (Bit14 = LOW), Bits [12:0] select the source stream and
channel number as detailed in Table 5. In Message Mode (Bit14 = HIGH), Bits [12:8] are unused and Bits [7:0]
contain the message byte to be transmitted.
The Control Register bits MS2, MS1, and MS0 must be set to 001, respectively, to select the Backplane Connection
Memory for the Write and Read operations via the microprocessor port. See Section 7.0, Microprocessor Port, and
Section 13.1, Control Register (CR)
for details on microprocessor port access.
Source Stream Bit Rate
Source Stream No.
Source Channel No.
2Mb/s
[12:8]
legal values 0:31
[7:0]
legal values 0:31
4Mb/s
[12:8]
legal values 0:31
[7:0]
legal values 0:63
8Mb/s
[12:8]
legal values 0:31
[7:0]
legal values 0:127
16Mb/s
[12:8]
legal values 0:31
[7:0]
legal values 0:255
32Mb/s
(Backplane streams only)
[12:9]
legal values 0:15
[8:0]
legal values 0:511
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MT90870 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Flexible 12 k Digital Switch (F12kDX)
MT90870AG 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays
MT90870AG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 12K X 12K/8K X 4K 1.8V/3.3V 272BGA - Trays