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參數(shù)資料
| 型號(hào)： | MT89L80AN |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | CMOS ST-BUS⑩ FAMILY Digital Switch |
| 中文描述： | 意法半導(dǎo)體的CMOS總線⑩家庭數(shù)字開關(guān) |
| 文件頁數(shù)： | 6/15頁 |
| 文件大?。?/td> | 75K |
| 代理商： | MT89L80AN |
MT89L80
Advance Information
2-8
Figure 5 - Connection Memory High Bits
Figure 6 - Connection Memory Low Bits
Bit
NameE
Description
2
Message
Channel
When 1, the contents of the corresponding location in Connection Memory Low are
output on the location’s channel and stream. When 0, the contents of the corresponding
location in Connection Memory Low act as an address for the Data Memory and so
determine the source of the connection to the location’s channel and stream.
1
CSTo Bit
This bit is output on the CSTo pin one channel early. The CSTo bit for stream 0 is output
first.
0
Output
Enable
If the ODE pin is high and bit 6 of the Control Register is 0, then this bit enables the
output driver for the location’s channel and stream. This allows individual channels on
individual streams to be made high-impedance, allowing switching matrices to be
constructed. A 1 enables the driver and a 0 disables it.
Bit
Name
Description
7-5*
Stream
Address
Bits*
The number expressed in binary notation on these 3 bits is the number of the ST-BUS
stream for the source of the connection. Bit 7 is the most significant bit. e.g., if bit 7 is 1,
bit 6 is 0 and bit 5 is 0, then the source of the connection is a channel on STi4.
4-0*
Channel
Address
Bits*
The number expressed in binary notation on these 5 bits is the number of the channel
which is the source of the connection (The ST-BUS stream where the channel lies is
defined by bits 7, 6 and 5.). Bit 4 is the most significant bit. e.g., if bit 4 is 1, bit 3 is 0, bit 2
is 0, bit 1 is 1 and bit 0 is 1, then the source of the connection is channel 19.
*If bit 2 of the corresponding Connection High location is 1 or if bit 6 of the Control Register is 1, then these entire
8 bits are output on the channel and stream associated with this location. Otherwise, the bits are used as indicated
to define the source of the connection which is output on the channel and stream associated with this location.
7
6
5
4
3
2
1
0
No Corresponding Memory
- These bits give 0s if read.
Per Channel
Control Bits
7
6
5
4
3
2
1
0
Stream
Address
Bits
Channel
Address
Bits
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MT89L80AN1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 16.384MBPS 3.3V 48SSOP /BAKE/DRYPACK - Rail/Tube |
| MT89L80ANR | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:CMOS ST-BUSTM Family |
| MT89L80ANR1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 16.384MBPS 3.3V 48SSOP - Tape and Reel 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM/TSI SWITCH 256X256 48SSOP 制造商:Microsemi Corporation 功能描述:IC TDM/TSI SWITCH 256X256 48SSOP |
| MT89L80AP | 制造商:Microsemi Corporation 功能描述: |
| MT89L80AP1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 16.384MBPS 3.3V 44PLCC - Rail/Tube 制造商:Microsemi Corporation 功能描述:IC TDM/TSI SWITCH 256X256 44PLCC |
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