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參數(shù)資料
| 型號： | MT89L80AN |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | CMOS ST-BUS⑩ FAMILY Digital Switch |
| 中文描述： | 意法半導(dǎo)體的CMOS總線⑩家庭數(shù)字開關(guān) |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 75K |
| 代理商： | MT89L80AN |
MT89L80
Advance Information
2-14
Timing is over recommended temperature & power supply voltages.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.
Figure 14 - Processor Bus
AC Electrical Characteristics
- Processor Bus (Figures 14)
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
Chip Select Setup Time
t
CSS
t
RWS
t
ADS
0
ns
2
Read/Write Setup Time
5
ns
3
Address Setup Time
5
ns
4
Acknowledgment Delay
Control Register Read
t
AKD
52
120
ns
C
L
=150 pF
Control Register Write
t
AKD
t
AKD
t
AKD
t
AKD
t
FWS
t
SWD
t
RDS
t
DHT
t
DHT
t
RDZ
t
CSH
t
RWH
t
ADH
t
AKH
25
65
ns
C
L
=150 pF
C
L
=150 pF
C
L
=150 pF
C
L
=150 pF
Connection Memory Read
62
120
ns
Connection Memory Write
30
53
ns
Data Memory Read
560
1220
ns
5
Fast Write Data Setup Time
0
ns
6
Slow Write Data Delay
122
ns
7
Read Data Setup Time
0
ns
C
L
= 150 pF
R
L
=1 K
, C
L
=150 pF
8
Data Hold Time
Read
Write
10
90
ns
5
10
ns
9
Read Data To High Impedance
15
50
90
ns
R
L
=1 K
, C
L
=150 pF
10
Chip Select Hold Time
0
ns
11
Read/Write Hold Time
0
ns
12
Address Hold Time
8
ns
13
Acknowledgment Hold Time
50
80
ns
R
L
=1 K
, C
L
=150 pF
DS
CS
R/W
A5
to
A0
DTA
D7
to
D0
t
CSS
t
RWS
t
ADS
t
AKD
t
RDS
t
SWD
t
FWS
t
CSH
t
RWH
t
ADH
t
AKH
t
DHT
*
*
*
*
t
RDZ
V
HM
V
LM
V
HM
V
LM
V
HM
V
LM
V
HM
V
LM
V
HM
V
LM
V
HM
V
LM
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