參數(shù)資料
型號(hào)： MT8926AP
廠商： Mitel Networks Corporation
英文描述： ISO-CMOS ST-BUS⑩ FAMILY T1 Performance Monitoring Adjunct Circuit (PMAC)
中文描述： 異意法半導(dǎo)體的CMOS總線⑩家庭T1性能監(jiān)控兼任電路（PMAC下）
文件頁(yè)數(shù)： 16/26頁(yè)
文件大小： 309K
代理商： MT8926AP
4-18
MT8926
transition of the CRCR bit (CSTi1 channel 11 bit 5,
PMAC Control Word). This will ensure the CRC error
counter never overflows.
SLIP and SYN Interrupts
The MT8976 SLIP and SYN status bits are passed to
the PMAC via the MT8976/77 CSTo to PMAC CSTi0
connection. A MT8926 interrupt will be initiated when
the SLIP bit of the framer changes state. This is the
only interrupt source that does not have to be
cleared before another interrupt of that group can
make IRQ go low. Therefore, when IRQ is returned to
a high impedance condition after a SLIP interrupt
and all other G1 interrupts are quiescent, any G1
interrupt can make IRQ to go low.
A Low-to-High transition of the MT8976/77 SYN bit
will initiate a PMAC interrupt. This loss of
synchronization situation may indicate that a loss of
signal condition (LOS) exists or that an all ones (AIS
or Blue Alarm) is being received. Therefore, the SYN
interrupt service routine should check the state of the
AIS and LOS bits of CSTo.
G2 interrupts are cleared when SEI, FSI, CSI and BSI = 0.
Note: AND denotes a logical and.
Table 17. Group Two (G2) Interrupt Activation and Clearing
Signal
To Trigger interrupt (IRQ low)
To Clear and Arm interrupt
(
IRQ high impedance)
SEI
SEI bit low to high AND other G2
interrupts quiescent AND IRQ
high impedance.
The INTA bit of the PMAC Control Word (CSTi1 channel 11 bit
1) should be made low to clear the interrupt mechanism (IRQ
high impedance). All G2 interrupts must be clear and INTA
must be high before a further interrupt can be generated from
G2.
The SEI bit will remain clear as long as the INTA bit is low. SEI
can also be cleared (low) by toggling SER (CSTi1 channel 11 bit
7) from high to low.
FSI is cleared (low) by toggling FER (CSTi1 channel 11 bit 6)
from high to low.
CSI is cleared (low) by toggling CRCR (CSTi1 channel 11 bit 5)
from high to low. Valid for ESF only.
BSI is cleared (low) by toggling BPVR (CSTi1 channel 11 bit 4)
from high to low.
FSI
FSI bit low to high AND other G2
interrupts quiescent AND IRQ
high impedance.
CSI
CSI bit low to high AND other G2
interrupts quiescent AND IRQ
high impedance.
BSI
BSI bit low to high AND other G2
interrupts quiescent AND IRQ
high impedance.
相關(guān)PDF資料
PDF描述
MT8930B Subscriber Network Interface Circuit
MT8930BC Subscriber Network Interface Circuit
MT8930BE Subscriber Network Interface Circuit
MT8930BP Subscriber Network Interface Circuit
MT8931B Subscriber Network Interface Circuit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT8930 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Subscriber Network Interface Circuit Preliminary Information
MT8930B 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Network Interface Circuit
MT8930BC 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Network Interface Circuit
MT8930BE 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Network Interface Circuit
MT8930BP 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Subscriber Network Interface Circuit
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*