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參數(shù)資料
| 型號(hào)： | MT58L64L32D |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 64K x 32，3.3V I/O, Pipelined, Double-Cycle Deselect，SyncBurst SRAM(2Mb，3.3V輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)RAM) |
| 中文描述： | 64K的x 32,3.3六/ O的流水線，雙循環(huán)取消，SyncBurst的SRAM（處理器，3.3V的輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)內(nèi)存） |
| 文件頁(yè)數(shù)： | 21/24頁(yè) |
| 文件大?。?/td> | 432K |
| 代理商： | MT58L64L32D |
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21
2Mb: 128K x 18, 64K x 32/36 Pipelined, DCD SyncBurst SRAM
MT58L128L18D_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
2Mb: 128K x 18, 64K x 32/36
PIPELINED, DCD SYNCBURST SRAM
READ/WRITE TIMING
tKC
tKL
CLK
ADSP#
tADSH
tADSS
ADDRESS
tKH
OE#
ADSC#
CE#
(NOTE 2)
tAH
tAS
A2
tCEH
tCES
Q
High-Z
ADV#
Single WRITE
D(A3)
A4
A5
A6
D(A5)
D(A6)
D
BURST READ
Back-to-Back READs
(NOTE 5)
High-Z
Q(A2)
Q(A1)
Q(A4)
Q(A4+1)
Q(A4+2)
tWH
tWS
Q(A4+3)
tOEHZ
tDH
tDS
tOELZ
tKQLZ
tKQ
Back-to-Back
WRITEs
A1
BWE#,
BWa#-BWd#
(NOTE 4)
A3
DON’T CARE
UNDEFINED
NOTE:
1. Q(A4) refers to output from address A4. Q(A4 + 1) refers to output from the next internal burst address following A4.
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When
CE# is HIGH, CE2# is HIGH and CE2 is LOW.
3. The data bus (Q) remains in High-Z following a WRITE cycle unless an ADSP#, ADSC# or ADV# cycle is performed.
4. GW# is HIGH.
5. Back-to-back READs may be controlled by either ADSP# or ADSC#.
t
ADSS
t
WS
t
DS
t
CES
t
AH
t
ADSH
t
WH
t
DH
t
CEH
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
2.2
2.2
2.2
2.2
0.5
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ/WRITE TIMING PARAMETERS
-6
-7.5
-10
SYM
t
KC
f
KF
t
KH
t
KL
t
KQ
t
KQLZ
t
OELZ
t
OEHZ
t
AS
MIN
6.0
MAX
MIN
7.5
MAX
MIN
10
MAX
UNITS
ns
MHz
ns
ns
ns
ns
ns
ns
ns
166
133
100
1.7
1.7
1.9
1.9
3.2
3.2
3.5
4.0
5.0
1.5
0
1.5
0
1.5
0
3.5
4.0
4.5
1.5
1.5
2.2
-6
-7.5
-10
SYM
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT58L128L18F | 128K x 18, Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L128V18F | 128K x 18, Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L64L32F | 64K x 32,Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L64L36F | 64K x 36,Flow-Through SyncBurst SRAM(2Mb,流通式同步脈沖靜態(tài)RAM) |
| MT58L128L18P | 128K x 18, Pipelined, SCD SyncBurst SRAM(2Mb，流水線式，單循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L64L32DT-10 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT58L64L32DT10A | 制造商:Micron Technology Inc 功能描述: |
| MT58L64L32DT-6 | 制造商:Cypress Semiconductor 功能描述:64KX32 SRAM PLASTIC TQFP 3.3V |
| MT58L64L32DT-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT58L64L32DT-7.5TR | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:Micron Technology Inc 功能描述: |
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