參數(shù)資料
型號(hào): MT55L512L18P-1
廠商: Micron Technology, Inc.
英文描述: IBM AT-AT NULL MODEM CABL15 FT FF
中文描述: 8MB的ZBT SRAM的
文件頁(yè)數(shù): 21/30頁(yè)
文件大?。?/td> 497K
代理商: MT55L512L18P-1
21
8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM
MT55L512L18P_2.p65
Rev. 6/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
8Mb: 512K x 18, 256K x 32/36
PIPELINED ZBT SRAM
NOTE:
1. V
DD
Q = +3.3V ±0.165V for 3.3V I/O configuration; V
DD
Q = +2.5V +0.4V/-0.125V for 2.5V I/O
configuration.
2. I
DD
is specified with no output current and increases with faster cycle times. I
DD
Q increases with faster cycle times and
greater output loading.
3.
Device deselected
means device is in a deselected cycle as defined in the truth table.
Device selected
means device
is active (not in deselected mode).
4. Typical values are measured at +3.3V, +25
°
C and 10ns cycle time.
5. This parameter is sampled.
I
DD
OPERATING CONDITIONS AND MAXIMUM LIMITS
(Note 1) (0
°
C
T
A
+70
°
C; V
DD
= +3.3V ±0.165V unless otherwise noted)
DESCRIPTION
Power Supply
Current: Operating or
V
IH
; Cycle time
t
KC (MIN);
V
DD
= MAX; Outputs open
Power Supply
Device selected; V
DD
= MAX;
Current: Idle
All inputs
V
SS
+ 0.2 or
V
DD
- 0.2;
Cycle time
t
KC (MIN)
CMOS Standby
Device deselected; V
DD
= MAX;
All inputs
V
SS
+ 0.2 or
V
DD
- 0.2;
All inputs static; CLK frequency = 0
TTL Standby
Device deselected; V
DD
= MAX;
All inputs
V
IL
or
V
IH
;
All inputs static; CLK frequency = 0
Clock Running
Device deselected; V
DD
= MAX;
ADV/LD#
V
IH
; All inputs
V
SS
+ 0.2
or
V
DD
- 0.2; Cycle time
t
KC (MIN)
Snooze Mode
CONDITIONS
SYMBOL
TYP
-6
-7.5
-10
UNITS NOTES
Device selected; All inputs
V
IL
I
DD
200
500
400
300
mA
2, 3, 4
CKE#
V
IH
;
I
DD
1
10
25
25
20
mA
2, 3, 4
I
SB
2
0.5
10
10
10
mA
3, 4
I
SB
3
6
25
25
25
mA
3, 4
I
SB
4
45
120
75
60
mA
3, 4
ZZ
V
IH
I
SB
2
Z
0.5
10
10
10
mA
4
MAX
TQFP THERMAL RESISTANCE
DESCRIPTION
Thermal Resistance
(Junction to Ambient)
CONDITIONS
SYMBOL
θ
JA
TYP
40
UNITS NOTES
°
C/W
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51.
5
Thermal Resistance
(Junction to Top of Case)
θ
JC
8
°
C/W
5
BGA THERMAL RESISTANCE
DESCRIPTION
Junction to Ambient
(Airflow of 1m/s)
CONDITIONS
SYMBOL
θ
JA
TYP
40
UNITS NOTES
°
C/W
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51.
5
Junction to Case (Top)
θ
JC
9
°
C/W
5
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