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128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65
–
Rev. E; Pub. 1/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2001, Micron Technology, Inc.
128Mb: x4, x8, x16
SDRAM
READ – WITH AUTO PRECHARGE
1
ENABLE AUTO PRECHARGE
tCH
tCL
tCK
tAC
tLZ
tRP
tRAS
tRC
tRCD
CAS Latency
DQM /
DQML, DQMH
CKE
CLK
A0-A9, A11
DQ
BA0, BA1
A10
tOH
D
OUT
m
tCMH
tCMS
tAH
tAS
tAH
tAS
tAH
tAS
ROW
ROW
BANK
BANK
ROW
ROW
BANK
DON
’
T CARE
UNDEFINED
tHZ
tOH
D
OUT
m
+ 3
tAC
tOH
tAC
tOH
tAC
D
OUT
m
+ 2
D
OUT
m
+ 1
COMMAND
tCMH
tCMS
NOP
NOP
NOP
ACTIVE
NOP
READ
NOP
ACTIVE
NOP
tCKH
tCKS
COLUMN
m
2
T0
T1
T2
T4
T3
T5
T6
T7
T8
NOTE:
1. For this example, the burst length = 4, and the CAS latency = 2.
2. x16: A9 and A11 =
“
Don
’
t Care
”
x8: A11 =
“
Don
’
t Care
”
*CAS latency indicated in parentheses.
-7E
-75
-8E
SYMBOL*
t
CMH
t
CMS
t
HZ(3)
t
HZ(2)
t
LZ
t
OH
t
RAS
t
RC
t
RCD
t
RP
MIN
0.8
1.5
MAX
MIN
0.8
1.5
MAX
MIN
1
2
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5.4
5.4
5.4
6
6
6
1
3
37
60
15
15
1
3
44
66
20
20
1
3
50
70
20
20
120,000
120,000
120,000
TIMING PARAMETERS
-7E
-75
-8E
SYMBOL*
t
AC (3)
t
AC (2)
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CKH
t
CKS
MIN
MAX
5.4
5.4
MIN
MAX
5.4
6
MIN
MAX
6
6
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.8
1.5
2.5
2.5
7
7.5
0.8
1.5
0.8
1.5
2.5
2.5
7.5
10
0.8
1.5
1
2
3
3
8
10
1
2