參數(shù)資料
型號(hào)： MT312
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 消費(fèi)家電
英文描述： Satellite Channel Decoder
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： MQFP-80
文件頁數(shù)： 30/90頁
文件大小： 318K
代理商： MT312
MT312
DiSEqC Control
30
5.2 DiSEqC Control Read/Write Registers
5.2.1 DiSEqC Mode Control. Register 22 (R/W)
B7:
Reserved.
Must be set low.
B6:
HV H/V polarisation control: High = Horizontal, DISEQC[1] pin = high
Low = Vertical, DISEQC[1] pin = low
The DISEQC[1] pin controls the externally generated 13/18V LNB voltage.
B5-3:
Number of bytes in DiSEqC
instruction minus 1, to output on DISEQC[0] pin.
i.e. if the message contains four bytes, program B5-3 with the value three.
B2-0:
DiSEqC
mode:
0:
1:
2:
3:
4:
5-7:
22kHz off
22kHz on continuous
Burst mode - on for 12.5ms = '0'
Burst mode - modulated 1:2 for 12.5ms = '1'
Modulated with bytes from DISEQC INSTR
Reserved.
Note:
for modes 2 and 3, an interrupt is generated 16ms after the '0' or '1' burst.
for mode 4, there is a 16ms delay before the message bytes, then an interrupt is generated 16ms after
the last message byte has been sent. The requisite number of bytes must be pre-loaded into
DISEQC INSTR (register 36) before this bit is set, see 31.
5.2.2 DiSEqC(tm) Ratio. Register 35 (R/W)
DISEQC RATIO[7:0] This must be programmed to set the Diseqc output tone frequency.
F
out
=
Where F
out
is in kHz and F
xtal
is in MHz.
For a 22kHz output tone, DISEQC RATIO[7:0] = 11.364 * F
xtal
e.g. with F
xtal
= 10MHz, DISEQC RATIO[7:0] = 114, or for 15 MHz 170.
NAME
ADR
B7
B6
B5
B4
B3
B2
B1
B0
Def
hex
DISEQC MODE
22
Reserved
HV
DISEQC
instruction length
22kHz mode
R/W
00
NAME
ADR
B7
B6
B5
B4
B3
B2
B1
B0
Def
hex
DISEQC RATIO
35
DISEQC RATIO[7:0]
R/W
00
4*DISEQC_RATIO[7:0]
F
xtal
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