參數(shù)資料
型號： MSP430F2274MRHAEP
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, RISC MICROCONTROLLER, PQCC40
封裝： GREEN, PLASTIC, MO-220VJJD-2, VQFN-40
文件頁數(shù)： 36/79頁
文件大?。?/td> 1274K
代理商： MSP430F2274MRHAEP
www.ti.com
SLAS614C – SEPTEMBER 2008 – REVISED JULY 2010
10-Bit ADC, Built-In Voltage Reference – Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP MAX
UNIT
IVREF+ ≤ 1 mA, REF2_5V = 0
–55°C to 125°C
2.2
Positive built-in
VCC,REF+
reference analog
IVREF+ ≤ 0.5 mA, REF2_5V = 1
–55°C to 125°C
2.8
V
supply voltage range
IVREF+ ≤ 1 mA, REF2_5V = 1
–55°C to 125°C
2.9
IVREF+ ≤ IVREF+max, REF2_5V = 0
–55°C to 125°C
2.2 V/3 V
1.41
1.5
1.59
Positive built-in
VREF+
V
reference voltage
IVREF+ ≤ IVREF+max, REF2_5V = 1
–55°C to 125°C
3 V
2.35
2.5
2.65
2.2 V
±0.5
Maximum VREF+ load
ILD,VREF+
–55°C to 125°C
mA
current
3 V
±1
IVREF+ = 500 mA ± 100 mA,
Analog input voltage VAx 0.75 V,
–55°C to 125°C
2.2 V/3 V
±2
REF2_5V = 0
VREF+ load regulation
LSB
IVREF+ = 500 mA ± 100 mA,
Analog input voltage VAx 1.25 V,
–55°C to 125°C
3 V
±2
REF2_5V = 1
IVREF+ = 100 mA→900
ADC10SR = 0
–55°C to 125°C
400
mA,
VREF+ load regulation
VAx 0.5 × VREF+,
3 V
ns
response time
ADC10SR = 1
–55°C to 125°C
2000
Error of conversion
result
≤ 1 LSB
Maximum capacitance
IVREF+ ≤ = 1 mA,
CVREF+
–55°C to 125°C
2.2 V/3 V
100
pF
at pin VREF+
(1)
REFON = 1, REFOUT = 1
Temperature
IVREF+ = const. with
ppm/°
TCREF+
–55°C to 125°C
2.2 V/3 V
±100
coefficient
0 mA
≤ IVREF+ ≤ 1 mA
C
Settling time of internal
IVREF+ = 0.5 mA, REF2_5V = 0
tREFON
–55°C to 125°C
3.6 V
30
ms
reference voltage (2)
REFON = 0
→ 1
IVREF+ = 0.5 mA,
ADC10SR = 0
–55°C to 125°C
1
REF2_5V = 0,
2.2 V
REFON = 1,
ADC10SR = 1
–55°C to 125°C
2.5
REFBURST = 1
Settling time of
tREFBURST
ms
reference buffer(2)
IVREF+ = 0.5 mA,
ADC10SR = 0
–55°C to 125°C
2
REF2_5V = 1,
3 V
REFON = 1,
ADC10SR = 1
–55°C to 125°C
4.5
REFBURST = 1
(1)
The capacitance applied to the internal buffer operational amplifier, if switched to terminal P2.4/TA2/A4/VREF+/VeREF+ (REFOUT = 1),
must be limited; the reference buffer may become unstable otherwise.
(2)
The condition is that the error in a conversion started after tREFON or tRefBuf is less than ±0.5 LSB.
Copyright 2008–2010, Texas Instruments Incorporated
41
Product Folder Link(s): MSP430F2274-EP
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