參數(shù)資料
型號: MRFIC1859
廠商: Motorola, Inc.
英文描述: Dual-Band GSM 3.6V Integrated RF Power Amplifier(GSM 3.6V集成式射頻功放)
中文描述: 雙頻GSM 3.6V的集成RF功率放大器(手機3.6V的集成式射頻功放)
文件頁數(shù): 10/15頁
文件大?。?/td> 180K
代理商: MRFIC1859
MRFIC1859
10
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS – RF AND IF DEVICE DATA
APPLICATIONS INFORMATION
Design Philosophy
The MRFIC1859 is a dual–band single supply RF
integrated power amplifier designed for use in
GSM900/DCS1800 handheld radios under 3.6 V operation.
With matching circuit modifications, it is also applicable for
use in triple band GSM900/DCS1800/PCS1900 equipment.
Typical performances in GSM/DCS at 3.6 V are: GSM: 35.8
dBm with 53% PAE and, DCS: 34 dBm with 43% PAE.
It features a large band (900 to 1800 MHz) internal
Negative Voltage Generator based on RF rectification of the
input carrier after its amplification by two dedicated buffer
stages (See Simplified Block Diagram). This method
eliminates spurs found on the output signal when using dc/dc
converter type negative voltage generators, either on or off
chip. The buffer generates also a step–up positive voltage,
which can be used to drive a NMOS drain switch.
External Circuit Considerations
The MRFIC1859 can be tuned by changing the values
and/or positions of the appropriate external components (see
Figure 1: Application Schematic). While tuning the RF
line–up, it is recommended to apply external negative supply
in order to prevent any damage to the power amplifier stages.
Poor tuning on the input may not provide enough RF power to
operate the negative voltage generator properly.
Input matching is a shunt–C, series–L, low pass structure
for GSM and a shunt–L, series–L high pass structure for
DCS. It should be optimized at the rated input power (e.g. 3.0
dBm in GSM, 5.0 dBm in DCS). Since the input lines feed
both 1st stages and 1st stage buffers, input matching should
be iterated with buffer and Q1 drain matching. Note that dc
blocking capacitors are included on chip.
First stage buffer amplifier is tuned with a short 80
microstrip line which may be replaced by a chip inductor.
Second stage buffer amplifier is supplied and matched
through a discrete chip inductor. Those two elements are
tuned to get the maximum output from voltage generator. The
overall typical buffer current (DB1 + DB2) is about 60 mA in
GSM and 100 mA in DCS. However, the negative generator
needs a settling time of 1.0
μ
s (see burst mode paragraph).
During this transient period of time, both stages are biased to
IDSS, which is about 200 mA each.
The step–up positive voltage available at Pin 2, which is
approximately 10 V in each band, can be used to drive a
NMOS drain switch for best performances.
Q1 drains are supplied and matched through 80
printed
microstrip lines that could be replaced by discrete chip
inductors as well. Their lengths (or equivalent inductor
values) are tuned by sliding the RF decoupling capacitors
along to get the maximum gain on the first stages.
Q2 drains are supplied through 60
printed microstrip
lines that contribute also to the interstage matching in order
to optimum drive to the final stages.
The line length for Q2G and Q2D is small, so replacing it
with discrete inductors is not practical.
Q3 stages are fed via 50
printed microstrip lines that
must handle the high supply current of that stages (2.0 Amp
peak) without significant voltage drop. This line can be buried
in an inner layer to save PCB space or be a discrete RF
choke.
Output matching is accomplished in both bands with two
stages low pass networks. Easy implementation is achieved
with shunt capacitors mounted along a 50
microstrip
transmission line. Value and position are chosen to reach a
load line of 2.0
while conjugating the device output
parasitics. The networks must also properly terminate the
second and third harmonic level. Use of high–Q capacitors
for the first output matching capacitor circuits is
recommended in order to get the best output power and
efficiency performances.
Note: the choice of output matching capacitor type and
supplier will affect H2 and H3 level and efficiency, because of
series resonant frequency.
相關PDF資料
PDF描述
MRW54001 MICROWAVE LINEAR POWER TRANSISTORS
MSB709-RT1 PNP General Purpose Amplifier Transistor Surface Mount
MSB709-RT1 PNP General Purpose Amplifier Transistor Surface Mount
MSB709RT1 PNP General Purpose Amplifier Transistor Surface Mount
MSB709-RT1 PNP General Purpose Amplifier Transistor Surface Mount
相關代理商/技術參數(shù)
參數(shù)描述
MRFIC1870 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.2 V DCS/PCS GaAs Integrated Power Amplifier
MRFIC1870D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.2 V DCS/PCS GaAs Integrated Power Amplifier
MRFIC1870PP 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.2 V DCS/PCS GaAs Integrated Power Amplifier
MRFIC1884 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Dual-Band CDMA Upconverter
MRFIC1884R2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Dual-Band CDMA Upconverter