參數(shù)資料
型號: MQ80C154-16P883
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 16 MHz, MICROCONTROLLER, CQFP44
文件頁數(shù): 46/142頁
文件大?。?/td> 61013K
代理商: MQ80C154-16P883
14
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
SRAM Stack area where the Subroutine and Interrupt Stacks are located. A Stack PUSH command will decrease
the Stack Pointer.
The Stack in the data SRAM must be defined by the program before any subroutine calls are executed or interrupts
are enabled. Initial Stack Pointer value equals the last address of the internal SRAM and the Stack Pointer must be
set to point above start of the SRAM, see Figure 8-2 on page 19.
See Table 7-1 for Stack Pointer details.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of bits actually used is
implementation dependent. Note that the data space in some implementations of the AVR architecture is so small
that only SPL is needed. In this case, the SPH Register will not be present.
7.6.1
SPH and SPL – Stack Pointer
7.7
Instruction execution timing
This section describes the general access timing concepts for instruction execution. The AVR CPU is driven by the
CPU clock clk
CPU, directly generated from the selected clock source for the chip. No internal clock division is used.
Figure 7-4 on page 15 shows the parallel instruction fetches and instruction executions enabled by the Harvard
architecture and the fast-access Register File concept. This is the basic pipelining concept to obtain up to 1 MIPS
per MHz with the corresponding unique results for functions per cost, functions per clocks, and functions per
power-unit.
Table 7-1.
Stack Pointer instructions.
Instruction
Stack pointer
Description
PUSH
Decremented by 1
Data is pushed onto the stack
CALL
ICALL
RCALL
Decremented by 2
Return address is pushed onto the stack with a subroutine call or
interrupt
POP
Incremented by 1
Data is popped from the stack
RET
RETI
Incremented by 2
Return address is popped from the stack with return from
subroutine or return from interrupt
Bit
151413121110
9
8
0x3E (0x5E)
SP10
SP9
SP8
SPH
0x3D (0x5D)
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
SPL
765
43210
Read/Write
R/W
Initial Value
000
00000
000
00000
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