參數(shù)資料
型號： MPC8321ZQAFDCA
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 333 MHz, RISC PROCESSOR, PBGA516
封裝： 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, PLASTIC, PBGA-516
文件頁數(shù)： 69/82頁
文件大?。?/td> 1059K
代理商： MPC8321ZQAFDCA
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3
Freescale Semiconductor
71
Thermal
22.7
Suggested PLL Configurations
To simplify the PLL configurations, the MPC8323E might be separated into two clock domains. The first
domain contain the CSB PLL and the core PLL. The core PLL is connected serially to the CSB PLL, and
has the csb_clk as its input clock. The second clock domain has the QUICC Engine PLL. The clock
domains are independent, and each of their PLLs are configured separately. Both of the domains has one
common input clock. Table 63 shows suggested PLL configurations for 33, 25, and 66 MHz input clocks.
23 Thermal
This section describes the thermal specifications of the MPC8323E.
23.1
Thermal Characteristics
Table 64 provides the package thermal characteristics for the 516 27
× 27 mm PBGA of the MPC8323E.
Table 63. Suggested PLL Configurations
Conf No.
SPMF
Core
PLL
CEMF
CEDF
Input Clock
Frequency
(MHz)
CSB
Frequency
(MHz)
Core
Frequency
(MHz)
QUICC
Engine
Frequency
(MHz)
1
0100
0000100
0110
0
33.33
133.33
266.66
200
2
0100
0000101
1000
0
25
100
250
200
3
0010
0000100
0011
0
66.67
133.33
266.66
200
4
0100
0000101
0110
0
33.33
133.33
333.33
200
5
0101
0000101
1000
0
25
125
312.5
200
6
0010
0000101
0011
0
66.67
133.33
333.33
200
Table 64. Package Thermal Characteristics for PBGA
Characteristic
Board type
Symbol
Value
Unit
Notes
Junction-to-ambient natural convection
Single-layer board (1s)
RθJA
28
°C/W
1, 2
Junction-to-ambient natural convection
Four-layer board (2s2p)
RθJA
21
°C/W
1, 2 ,3
Junction-to-ambient (@200 ft/min)
Single-layer board (1s)
RθJMA
23
°C/W
1, 3
Junction-to-ambient (@200 ft/min)
Four-layer board (2s2p)
RθJMA
18
°C/W
1, 3
Junction-to-board
—
RθJB
13
°C/W
4
Junction-to-case
—
RθJC
9°C/W
5
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