參數(shù)資料
型號(hào)： MPC8265AZUPJDC
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 22/50頁(yè)
文件大小： 0K
描述： IC MPU POWERQUICC II 480-TBGA
標(biāo)準(zhǔn)包裝： 21
系列： MPC82xx
處理器類(lèi)型： 32-位 MPC82xx PowerQUICC II
速度： 300MHz
電壓： 2V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 480-LBGA
供應(yīng)商設(shè)備封裝： 408-TBGA（37.5x37.5）
包裝： 托盤(pán)
MPC8260A PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2.0
Freescale Semiconductor
29
Clock Configuration Modes
3.2.2
PCI Agent Mode
The frequencies listed in Table 18 and Table 19 are for the purpose of illustration only. Users must select
a mode and input bus frequency so that the resulting configuration does not exceed the frequency rating
of the user’s device.
1001_010
66 MHz
3.5
233 MHz
3.5
233 MHz
4/8
58/29 MHz
1001_011
66 MHz
3.5
233 MHz
4
266 MHz
4/8
58/29 MHz
1001_100
66 MHz
3.5
233 MHz
4.5
300 MHz
4/8
58/29 MHz
1010_000
100 MHz
2
200 MHz
2
200 MHz
3/6
66/33 MHz
1010_001
100 MHz
2
200 MHz
2.5
250 MHz
3/6
66/33 MHz
1010_010
100 MHz
2
200 MHz
3
300 MHz
3/6
66/33 MHz
1010_011
100 MHz
2
200 MHz
3.5
350 MHz
3/6
66/33 MHz
1010_100
100 MHz
2
200 MHz
4
400 MHz
3/6
66/33 MHz
1011_000
100 MHz
2.5
250 MHz
2
200 MHz
4/8
62/31 MHz
1011_001
100 MHz
2.5
250 MHz
2.5
250 MHz
4/8
62/31MHz
1011_010
100 MHz
2.5
250 MHz
3
300 MHz
4/8
62/31 MHz
1011_011
100 MHz
2.5
250 MHz
3.5
350 MHz
4/8
62/31 MHz
1011_100
100 MHz
2.5
250 MHz
4
400 MHz
4/8
62/31 MHz
1 Input clock frequency is given only for the purpose of reference. User should set MODCK_H–MODCK_L so that the
resulting configuration does not exceed the frequency rating of the user’s part.
2 The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency is divided
by 2 (33 instead of 66 MHz, etc.). Refer to Table 15.
3 In this mode, PCI_MODCK must be “0”.
Table 18. Clock Default Configurations in PCI Agent Mode (MODCK_HI = 0000)
MODCK[1–3]1
Input Clock
Frequency
(PCI)2
CPM
Multiplication
Factor2
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency3
Bus Division
Factor
60x Bus
Frequency4
000
66/33 MHz
2/4
133 MHz
2.5
166 MHz
2
66 MHz
001
66/33 MHz
2/4
133 MHz
3
200 MHz
2
66 MHz
010
66/33 MHz
3/6
200 MHz
3
200 MHz
3
66 MHz
011
66/33 MHz
3/6
200 MHz
4
266 MHz
3
66 MHz
Table 17. Clock Configuration Modes in PCI Host Mode (continued)
MODCK_H –
MODCK[1–3]
Input Clock
Frequency1
(Bus)
CPM
Multiplication
Factor
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency
PCI Division
Factor2
PCI
Frequency2
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