參數(shù)資料
型號(hào): MPC8265AZUPJDC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 11/50頁(yè)
文件大?。?/td> 0K
描述: IC MPU POWERQUICC II 480-TBGA
標(biāo)準(zhǔn)包裝: 21
系列: MPC82xx
處理器類型: 32-位 MPC82xx PowerQUICC II
速度: 300MHz
電壓: 2V
安裝類型: 表面貼裝
封裝/外殼: 480-LBGA
供應(yīng)商設(shè)備封裝: 408-TBGA(37.5x37.5)
包裝: 托盤
MPC8260A PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2.0
Freescale Semiconductor
19
Electrical and Thermal Characteristics
Table 10 lists SIU output characteristics.
NOTE
Activating data pipelining (setting BRx[DR] in the memory controller)
improves the AC timing. When data pipelining is activated, sp12 can be
used for data bus setup even when ECC or PARITY are used. Also, sp33a
can be used as the AC specification for DP signals.
Table 10. AC Characteristics for SIU Outputs1
1 Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal.
Timings are measured at the pin.
Spec Number
Characteristic
Max Delay (ns)
Min Delay (ns)
Max
Min
66 MHz 83 MHz 66 MHz 83 MHz
sp31
sp30
PSDVAL/TEA/TA
76
0.5
sp32
sp30
ADD/ADD_atr./BADDR/CI/GBL/WT
8
6.5
0.5
sp33a
sp30
Data bus
6.5
0.5
sp33b
sp30
DP
8
7
0.5
sp34
sp30
Memory controller signals/ALE
6
5
0.5
sp35
sp30
All other signals
6
5.5
0.5
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