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| 型號： | MPC8245TVV333D |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 3/68頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT 333MHZ PPC 352-TBGA |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | MPC82xx |
| 處理器類型： | 32-位 MPC82xx PowerQUICC II |
| 速度： | 333MHz |
| 電壓： | 2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 352-LBGA |
| 供應(yīng)商設(shè)備封裝： | 352-TBGA（35x35） |
| 包裝： | 托盤 |
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MPC8245 Integrated Processor Hardware Specifications, Rev. 10
Freescale Semiconductor
11
Electrical and Thermal Characteristics
4.2.1
Output Driver Characteristics
Table 4 provides information on the characteristics of the output drivers referenced in Table 16. The values
are preliminary estimates from an IBIS model and are not tested.
Capacitance
Vin = 0 V, f = 1 MHz
Cin
—
16.0
pF
Notes:
1. See Table 16 for pins with internal pull-up resistors.
2. See Table 4 for the typical drive capability of a specific signal pin based on the type of output driver associated with that pin
as listed in Table 16.
3. These specifications are for the default driver strengths indicated in Table 4.
4. Leakage current is measured on input and output pins in the high-impedance state. The leakage current is measured for
nominal OVDD/LVDD, and VDD or both OVDD/LVDD and VDD must vary in the same direction.
Table 4. Drive Capability of MPC8245 Output Pins 5
Driver Type
Programmable
Output Impedance
(
Ω)
Supply
Voltage
IOH
IOL
Unit
Notes
DRV_STD_MEM
20 (default)
OVDD = 3.3 V
36.6
18.0
mA
2, 4, 6
40
18.6
9.2
mA
2, 4, 6
DRV_PCI
20
12.0
12.4
mA
1, 3
40 (default)
6.1
6.3
mA
1, 3
DRV_MEM_CTRL
6 (default)
20
40
GVDD = 3.3 V
89.0
42.3
mA
2, 4
DRV_PCI_CLK
36.6
18.0
mA
2, 4
DRV_MEM_CLK
18.6
9.2
mA
2, 4
Notes:
1. For DRV_PCI, IOH read from the IBIS listing in the pull-up mode, I(Min) column, at the 0.33-V label by interpolating between
the 0.3- and 0.4-V table entries’ current values that correspond to the PCI VOH = 2.97 = 0.9 × OVDD (OVDD = 3.3 V) where
table entry voltage = OVDD – PCI VOH.
2. For all others with GVDD or OVDD = 3.3 V, IOH read from the IBIS listing in the pull-up mode, I(Min) column, at the 0.9-V table
entry that corresponds to the VOH = 2.4 V where table entry voltage = GVDD/OVDD – VOH.
3. For DRV_PCI, IOL read from the IBIS listing in the pull-down mode, I(Min) column, at 0.33 V = PCI VOL = 0 × OVDD (OVDD
= 3.3 V) by interpolating between the 0.3- and 0.4-V table entries.
4. For all others with GVDD or OVDD = 3.3 V, IOL read from the IBIS listing in the pull-down mode, I(Min) column, at the 0.4-V
table entry.
5. See driver bit details for output driver control register (0x73) in the MPC8245 Integrated Processor Reference Manual.
6. See Chip Errata No. 19 in the MPC8245/MPC8241 RISC Microprocessor Chip Errata.
Table 3. DC Electrical Specifications (continued)
At recommended operating conditions (see Table 2)
Characteristic
Condition 3
Symbol
Min
Max
Unit
Notes
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