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B-6
MPC565/MPC566 Reference Manual
MOTOROLA
Crystal Oscillator External Components
B.3.2
PLL External Components
VDDSYN and VSSSYN are the PLL dedicated power supplies. These supplies must be
used only for the PLL and isolated from all other noisy signals in the board. VDDSYN
could be isolated with RC filter (see
Figure B-1), or LC filter. The maximum noise allowed
on VDDSYN, and VSSSYN is 50 mV with typical cut-off frequency of 500 Hz.
Figure B-6. RC Filter Example
Figure B-7. LC Filter Example (Alternative)
B.3.3
PLL Off-Chip Capacitor CXFC
CXFC is the PLL feedback capacitor. It must be located as close as possible to the XFC and
VDDSYN pads. The maximum noise allowed on XFC is 50 mV peak-to-peak with a typical
cut-off frequency of 500 Hz.
The required value for CXFC is determined by the following two cases:
0<(MF+1) <4
CXFC = (1130 * (MF+1) – 80) pF
VDDSYN
VSSSYN
Keyed
100 nF
10 W
VDD 2.6 V
MPC555 / MPC566
Board
VDDSYN
VSSSYN
Keyed
100 nF
8.2 mH
VDD 2.6 V
MPC555 / MPC566
Board