Input Value of Pins During POR Dependent on " />
參數(shù)資料
型號： MPC5567EVBE
廠商： Freescale Semiconductor
文件頁數(shù)： 5/68頁
文件大?。?/td> 0K
描述： BOARD EVALUATION MPC5567
標(biāo)準(zhǔn)包裝： 1
類型： MCU
適用于相關(guān)產(chǎn)品： MPC5567MZP132
所含物品： 板，線纜，CD，ICD，電源
Electrical Characteristics
MPC5567 Microcontroller Data Sheet, Rev. 2
Freescale
13
3.7.1
Input Value of Pins During POR Dependent on VDD33
When powering up the device, VDD33 must not lag the latest VDDSYN or RESET power pin (VDDEH6) by
more than the VDD33 lag specification listed in Table 6, spec 8. This avoids accidentally selecting the
bypass clock mode because the internal versions of PLLCFG[0:1] and RSTCFG are not powered and
therefore cannot read the default state when POR negates. VDD33 can lag VDDSYN or the RESET power
pin (VDDEH6), but cannot lag both by more than the VDD33 lag specification. This VDD33 lag specification
applies during power up only. VDD33 has no lead or lag requirements when powering down.
3.7.2
Power-Up Sequence (VRC33 Grounded)
The 1.5 V VDD power supply must rise to 1.35 V before the 3.3 V VDDSYN power supply and the RESET
power supply rises above 2.0 V. This ensures that digital logic in the PLL for the 1.5 V power supply does
not begin to operate below the specified operation range lower limit of 1.35 V. Because the internal 1.5 V
POR is disabled, the internal 3.3 V POR or the RESET power POR must hold the device in reset. Since
they can negate as low as 2.0 V, VDD must be within specification before the 3.3 V POR and the RESET
POR negate.
Figure 3. Power-Up Sequence (VRC33 Grounded)
3.7.3
Power-Down Sequence (VRC33 Grounded)
The only requirement for the power-down sequence with VRC33 grounded is if VDD decreases to less than
its operating range, VDDSYN or the RESET power must decrease to less than 2.0 V before the VDD power
increases to its operating range. This ensures that the digital 1.5 V logic, which is reset only by an ORed
POR and can cause the 1.5 V supply to decrease less than its specification value, resets correctly. See
Table 6, footnote 1.
VDDSYN and RESET Power
VDD
2.0 V
1.35 V
VDD must reach 1.35 V before VDDSYN and the RESET power reach 2.0 V
相關(guān)PDF資料
PDF描述
RCM10DTKH CONN EDGECARD 20POS DIP .156 SLD
VI-21T-EY CONVERTER MOD DC/DC 6.5V 50W
MIC2027-1YM IC USB DISTRIB SW QUAD 16-SOIC
RCM10DTKD CONN EDGECARD 20POS DIP .156 SLD
VI-21R-EY CONVERTER MOD DC/DC 7.5V 50W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC5567MVR112 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller
MPC5567MVR112R2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller
MPC5567MVR132 制造商:Freescale Semiconductor 功能描述: 制造商:Freescale Semiconductor 功能描述:2MB FLASH W/ECC, 5 CANS - Trays
MPC5567MVR132R2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller
MPC5567MVR80 制造商:Freescale Semiconductor 功能描述:2MB FLASH W/ECC, 5 CANS - Trays
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*