TL/F/5207
M
January 1988
MM54HC299/MM74HC299
8-Bit TRI-STATE
é
Universal Shift Register
General Description
This8-bitTRI-STATEshift/storageregisterutilizesadvanced
silicon-gate CMOS technology. Along with the low power
consumption and high noise immunity of standard CMOS
integrated circuits, it has the ability to drive 15 LS-TTL
loads. This circuit also features operating speeds compara-
ble to the equivalent low power Schottky device.
The MM54HC299/MM74HC299 features multiplexed in-
puts/outputs to achieve full 8-bit data handling in a single
20-pin package. Due to the large output drive capability and
TRI-STATE feature, this device is ideally suited for interfac-
ing with bus lines in a bus oriented system.
Two function select inputs and two output control inputs are
used to choose the mode of operation as listed in the func-
tion table. Synchronous parallel loading is accomplished by
taking both function select lines S0 and S1 high. This places
the TRI-STATE outputs in a high impedance state, which
permits data applied to the input/output lines to be clocked
into the register. Reading out of the register can be done
while the outputs are enabled in any mode. A direct overrid-
ing CLEAR input is provided to clear the register whether
the outputs are enabled or disabled.
The 54HC/74HC logic family is functionally as well as pinout
compatible with the standard 54LS/74LS logic family. All
inputs are protected from damage due to static discharge by
internal diode clamps to V
CC
and ground.
Features
Y
Typical operating frequency 40 MHz
Y
Typical propagation delay: 20 ns
Y
Low quiescent current: 80
m
A maximum (74HC)
Y
High output drive for bus applications
Y
Low quiescent current: 1
m
A maximum
Connection Diagram
Dual-In-Line Package
TL/F/5207–1
Order Number MM54HC299 or MM74HC299
TRI-STATE
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is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.