參數(shù)資料
型號(hào)： ML6652EH
英文描述： 10/100Mbps Ethernet Fiber and Copper Media Converter with Auto Negotiation
中文描述： 10/100Mbps以太網(wǎng)光纖收發(fā)器和銅具有自動(dòng)協(xié)商
文件頁(yè)數(shù)： 27/28頁(yè)
文件大?。?/td> 196K
代理商： ML6652EH
ML6652
8
January 2002
Preliminary Datasheet
PIN DESCRIPTIONS (continued)
Pin No. Signal Name
I/O
Description
CONTROL
13
TPOUTOFF#
I (CMOS)
Active low, the output stage of the twisted pair output is turned off. If not
connected they are pulled high by internal resistors
14
FOOUTOFF#
I (CMOS)
Active low, the output stage of the fiber optic output is turned off. If not
connected they are pulled high by internal resistors
24
PWRDWN#
I (CMOS)
Active low, all the circuits are powered down. Configuration pins are read and
register bits are initialized 3 to 8
s after a rising edge of PWRDWN#. If not
connected they are pulled high by internal resistors
DATA SIGNAL INPUT/OUTPUT
1
TPOUTP
O
The two operating modes available for these pins are selected with the
configuration pin PECLTP (pin 7) or the configuration bit PECLTP <30.3>
3
TPOUTN
O
Twisted Pair Interface Mode:
Transmit twisted pair positive and complementary outputs. These outputs form
a differential current output pair that drives Multi Level Transition (MLT-3)
waveforms into the network coupling transformer during 100Mbps mode,
Manchester encoded 10Base-T data or Normal Line Pulses (NLPs) during
10Mbps mode, and Fast Link Pulse (FLP) Bursts during Auto-Negotiation.
TPOUTP and TPOUTN must have external pull up resistors to VCC (refer to
description of RTTP pin)
PECL/LVPECL Compatible Interface Mode:
PECL/LVPECL interface positive and complementary outputs. These outputs
form a differential current output pair that drives Non Return to Zero Inverted
(NRZI) encoded 100Base-FX or 100Base-SX symbols during 100Mbps mode,
Manchester encoded 10Base-FL data or OPT_IDL during 10Mbps mode, and
Fiber Link Negotiation Pulse (FLNP) Bursts during Auto-Negotiation. TPOUTP
and TPOUTN must have external pull up resistors to VCC and be AC coupled
to the inputs of a fiber optic PMD module (refer to description of RTTP pin). A
resistor network may be needed to setup the common mode voltage at the
input pins of the PMD module
38
RTTP
I
Twisted pair PECL/LVPECL compatible driver bias resistor. An external resistor
connected between RTTP and ground sets a constant bias current for the
differential output driver circuitry TPOUTP/TPOUTN.
These output currents depend on the operating mode.
The recommended external component values are:
Twisted Pair Mode:
2K
, 1%, between RTTP and ground
50
, 1%, between TPOUTP and VCC
50
, 1%, between TPOUTN and VCC
PECL Compatible mode:
2K
, 1%, between RTTP and ground
62
, 1%, between TPOUTP and VCC
62
, 1%, between TPOUTN and VCC
Also AC coupled to the PMD inputs
10
TPINP
I
The two operating modes available for these pins are selected with the
configuration pin PECLTP (Pin 7) or the configuration bit PECLTP <30.3>.
11
TPINN
I
Twisted Pair Interface Mode:
Receive twisted pair positive and complementary inputs. These inputs form a
differential input pair that receives 100Base-TX, FLP Burst, or 10Base-T signal
from the network. The common mode voltage is set internally and the
differential input resistance is about 2K
.
The twisted pair interface requires a network consisting of a 1500Pf capacitor
and a 200
resistor in parallel; in series with each pin 10 and 11 as shown in
Figure 1.
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