參數(shù)資料
型號: ML60851CGA
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP44
封裝: 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44
文件頁數(shù): 30/67頁
文件大小: 389K
代理商: ML60851CGA
PEDL60851C-02
1Semiconductor
ML60851C
36/67
End Point 0 Transmit Control Register (EP0TXCON)
Read address
F0h
Write address
D7
D6
D5
D4
D3
D2
D1
D0
After a hardware reset
010
0000
0
After a bus reset
010
0000
1
Definition
010
0000
Configuration Bit: The configuration bit of EP0 becomes “1” during an USB bus reset (both D+ and D- being “0”
for more than 2.5
s). Packets can be sent from this end point to the host computer when this bit
is “1”. This IC does not respond to any transactions with this EP when this bit is “0”.
The transfer mode of EP0 is a control transfer and the end point address is fixed at 0h. Therefore, the values of D6
to D2 are fixed and other values written in them are invalid.
End Point 0 Transmit Data Toggle Register (EP0TXTGL)
Read address
F1h
Write address
D7
D6
D5
D4
D3
D2
D1
D0
After a hardware reset
000
0000
x
After a bus reset
000
0000
x
Definition
000
0000
The synchronization based on the data sequence toggling mechanism is carried out automatically by the
ML60851C.
Configuration Bit (R)
Transfer Type
00 = Control transfer
FIFO Number
Data Sequence Toggle Bit (R)
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