參數(shù)資料
型號(hào)： MK51DN512ZCMD10
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144
封裝： 13 X 13 MM, MAPBGA-144
文件頁(yè)數(shù)： 28/77頁(yè)
文件大小： 1066K
代理商： MK51DN512ZCMD10
Table 21. Flash command timing specifications (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
tersblk256k
Erase Flash Block execution time
256 KB data flash
—
160
800
ms
tersscr
Erase Flash Sector execution time
—
20
100
ms
tpgmsec512
tpgmsec1k
tpgmsec2k
Program Section execution time
512 B flash
1 KB flash
2 KB flash
—
TBD
ms
trd1all
Read 1s All Blocks execution time
—
2.8
ms
trdonce
Read Once execution time
—
35
μs
tpgmonce
Program Once execution time
—
50
TBD
μs
tersall
Erase All Blocks execution time
—
320
1600
ms
tvfykey
Verify Backdoor Access Key execution time
—
35
μs
tswapx01
tswapx02
tswapx04
tswapx08
Swap Control execution time
control code 0x01
control code 0x02
control code 0x04
control code 0x08
—
TBD
μs
1. Assumes 25MHz flash clock frequency.
2. Maximum times for erase parameters based on expectations at cycling end-of-life.
6.4.1.3 Flash (FTFL) current and power specfications
Table 22. Flash (FTFL) current and power specfications
Symbol
Description
Typ.
Unit
IDD_PGM
Worst case programming current in program flash
10
mA
6.4.1.4 Reliability specifications
Table 23. NVM reliability specifications
Symbol
Description
Min.
Typ.1
Max.
Unit
Notes
Program Flash
tnvmretp10k Data retention after up to 10 K cycles
5
TBD
—
years
tnvmretp1k Data retention after up to 1 K cycles
10
TBD
—
years
tnvmretp100 Data retention after up to 100 cycles
15
TBD
—
years
nnvmcycp
Cycling endurance
10 K
TBD
—
cycles
Peripheral operating requirements and behaviors
K51 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
34
Preliminary
Freescale Semiconductor, Inc.
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