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MIC9130
Micrel, Inc.
M9999-111108
16
November 2008
A 16.2 ohm, 1%, non inductive resistor with at least a 50mW
rating should be selected. A good choice would be an 0805
size metal lm or a 1/8 watt leaded metal lm resistor. A
series resistor between the current sense transformer and
the Isns input is not necessary unless it is used for low pass
ltering.
If the current sense transformer were not used, the sense
resistor would dissipate 1.7 watts.
R
V
I
SENSE
==
=
Ω
082
5
0 164
.
PI
R
W
DISS
RMS
SENSE
=×
=
×
=
2
325
0 164 17
..
.
Slope Compensation
Power supplies using peak current mode control techniques
require slope compensation when they are operating in
continuous mode and have a duty cycle greater than 50%.
Without slope compensation, the duty cycle of the power sup-
ply will alternate wide and narrow pulses commonly referred
to as subharmonic oscillations. Even though the MIC9130
operates below a 50% duty cycle, slope compensation adds
the benets of improved transient response and greater
noise immunity in the current sense loop (especially when
the current ramp is shallow). Slope compensation can be
implemented by adding an optimum 1/2 of the inductor cur-
rent downslope, reected back to the current sense input. In
real world applications, 2/3 of the inductor current downslope
is used to allow for component tolerances.
Slope compensation at the ISNS input may be implemented
by using a resistor and capacitor as shown in Figure 12. The
rectangular waveshape of the gate drive output is integrated
by the resistor/capacitor lter, which results in a ramp used
for the slope compensation signal. When the gate drive and
the current signal at the sense resistor goes low, the capaci-
tor is discharged to 0V.
Gate Drive
(pin 16)
ISNS
(pin 14)
MIC9130
R2
R1
C1
RSENSE
Figure 12
The procedure outlined below demonstrates how to calculate
the component values.
Compute the inductor current downslope as seen at the cur-
rent sense input.
For a yback, buck or forward mode topology the
inductor downslope is equal to:
M
di
dt
VV
L
O
D
2=
=
+
where :
VO is the output voltage
VD is the forward voltage drop of the rectier diode
L is the inductance of the output inductor (or the
secondary winding inductance for the yback
topology)
M2 is the inductor current downslope
For a boost topology, the inductor downslope is:
M
di
dt
VV
V
L
OUT
IN
D
2=
=
+
In a transformer isolated topology, the downslope must be
reected back to the primary by the turns ratio of the trans-
former. The reected downslope is:
MM
Ns
Np
REFLECTED
22
=×
where : Ns/Np is the turns ratio of the secondary winding
to the primary winding.
M2REFLECTED is the inductor curent downslope
reected to the secondary side of the current
sense transformer.
The reected downslope is multiplied by the current sense
resistor to obtain the downslope at the current sense input
pin (ISNS).
IM
R
SNS SLOPE
REFLECTED
S
_
=×
2
where Rs is the value of the current sense resistor.
The required downslope of the compensation ramp at the
ISNS input is:
MISNS SLOPE
30 67
=×
_
.
R1 is know if a value for the resistor between the current
sense resistor and the Isns pin, has already been selected.
If not chose a value of 1k, which will minimize any offset
and signal degradation at the ISNS pin. Select a value of
C1 to minimize signal degradation from the cutoff frequency
of R1/C1. The bandwidth should be at least six times the
switching frequency.
C
fR
S
1
21
=
×× ×
π
where: fS is the switching frequency of the power
supply (not the oscillator frequency)
The slope of the generated compensation ramp is:
MV
R1
R2 R1
1
R2 C1
GATE_DRIVE
3=
×
+
×
Solving for R2 and assuming R2 is much greater than R1.
R
VR
MC
GATE DRIVE
2
1
31
=
×
_
where: VGATE_DRIVE is the amplitude of the gate
drive waveform