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參數(shù)資料
| 型號(hào)： | MIC693MC |
| 廠商： | MICREL INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO16 |
| 封裝： | SOP-16 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 126K |
| 代理商： | MIC693MC |
July 2000
3
MIC691/693
Micrel
Pin Number
Pin Name
Pin Function
10
/PFO
Power fail output. The power fail comparator is independent of all other
functions on this device.
11
WDI
Watchdog input. The WDI input monitors microprocessor activity, an internal
watchdog timer resets itself with each transition on the watchdog input. If the
WDI pin is held high or low for longer than the watchdog timeout period,
/RESET and /WDO are forced low. The wachdog function can be disabled
by floating the WDI pin.
12
/CE OUT
Chip Enable Output. /CE OUT follows /CE IN when /RESET and RESETare
not asserted. /CE OUT is forced to VOUT when /RESET and RESET are
asserted
13
/CE IN
Chip Enable Input. /CE IN is the input for the chip enable gating circuit.
Decoder output or address line from
P can be used to generate /CE IN.
Connect to VOUT or GND if chip enable gating circuit is not used
14
/WDO
Watchdog Timer Output. Watchdog timer resets itself with each transition on
the watchdog input. If the WDI pin is held high or low for onger than the
watchdog timeout period, /RESET and /WDO are forced low. The watchdog
function can be disabled by floating te WDI pin.
15
/RESET
Output for the
P reset circuitry. /RESET is asserted if either V
CC goes
below the reset threshold or the watchdog times out. /RESET remains
asserted for one reset timeout period (Table 1.) after V
CC exceeds the reset
threshold or afterthewatchdog times out.
16
RESET
Output for the
P reset circuitry. RESET is activ high with an open drain and
is the inverse of /RESET.
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