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參數(shù)資料
| 型號： | MFRC53001T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | ISO-IEC 14443 A Reader IC |
| 封裝： | MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1 |
| 文件頁數(shù)： | 110/115頁 |
| 文件大?。?/td> | 2590K |
| 代理商： | MFRC53001T |
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MFRC530_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
110 of 115
continued >>
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
Table 70. TxControl register bit descriptions . . . . . . . . . .55
Table 71. CwConductance register (address: 12h) reset
value: 0011 1111b, 3Fh bit allocation . . . . . . . .56
Table 72. CwConductance register bit descriptions . . . .56
Table 73. PreSet13 register (address: 13h) reset value:
0011 1111b, 3Fh bit allocation . . . . . . . . . . . . .56
Table 74. PreSet13 register bit descriptions . . . . . . . . . .56
Table 75. CoderControl register (address: 14h) reset value:
0001 1001b, 19h bit allocation . . . . . . . . . . . . .57
Table 76. CoderControl register bit descriptions . . . . . . .57
Table 77. ModWidth register (address: 15h) reset value:
0001 0011b, 13h bit allocation . . . . . . . . . . . . .57
Table 78. ModWidth register bit descriptions . . . . . . . . . .57
Table 79. PreSet16 register (address: 16h) reset value:
0000 0000b, 00h bit allocation . . . . . . . . . . . . .58
Table 80. PreSet16 register bit descriptions . . . . . . . . . .58
Table 81. PreSet17 register (address: 17h) reset value:
0000 0000b, 00h bit allocation . . . . . . . . . . . . .58
Table 82. PreSet17 register bit descriptions . . . . . . . . . .58
Table 83. RxControl1 register (address: 19h) reset value:
0111 0011b, 73h bit allocation . . . . . . . . . . . . .59
Table 84. RxControl1 register bit descriptions . . . . . . . . .59
Table 85. DecoderControl register (address: 1Ah) reset
value: 0000 1000b, 08h bit allocation . . . . . . .60
Table 86. DecoderControl register bit descriptions . . . . .60
Table 87. BitPhase register (address: 1Bh) reset value:
1010 1101b, ADh bit allocation . . . . . . . . . . . .60
Table 88. BitPhase register bit descriptions . . . . . . . . . .60
Table 89. RxThreshold register (address: 1Ch) reset value:
1111 1111b, FFh bit allocation . . . . . . . . . . . . .61
Table 90. RxThreshold register bit descriptions . . . . . . .61
Table 91. BPSKDemControl register (address: 1Dh) reset
value: 0001 1110b, 1Eh bit allocation . . . . . . .61
Table 92. BPSKDemControl register bit descriptions . . .61
Table 93. RxControl2 register (address: 1Eh) reset value:
0100 0001b, 41h bit allocation . . . . . . . . . . . . .62
Table 94. RxControl2 register bit descriptions . . . . . . . . .62
Table 95. ClockQControl register (address: 1Fh) reset
value: 000x xxxxb, xxh bit allocation . . . . . . . .62
Table 96. ClockQControl register bit descriptions . . . . . .62
Table 97. RxWait register (address: 21h) reset value: 0000
0101b, 06h bit allocation . . . . . . . . . . . . . . . . .63
Table 98. RxWait register bit descriptions . . . . . . . . . . . .63
Table 99. ChannelRedundancy register (address: 22h)
reset value: 0000 0011b, 03h bit allocation . . .63
Table 100. ChannelRedundancy bit descriptions . . . . . . .63
Table 101. CRCPresetLSB register (address: 23h) reset
value: 0101 0011b, 63h bit allocation . . . . . . .64
Table 102. CRCPresetLSB register bit descriptions . . . . .64
Table 103. CRCPresetMSB register (address: 24h) reset
value: 0101 0011b, 63h bit allocation . . . . . . .64
Table 104. CRCPresetMSB bit descriptions . . . . . . . . . . 64
Table 105. PreSet25 register (address: 25h) reset value:
0000 0000b, 00h bit allocation . . . . . . . . . . . . 64
Table 106. PreSet25 register bit descriptions . . . . . . . . . 65
Table 107. MFOUTSelect register (address: 26h) reset
value: 0000 0000b, 00h bit allocation . . . . . . . 65
Table 108. MFOUTSelect register bit descriptions . . . . . 65
Table 109. PreSet27 (address: 27h) reset value: xxxx xxxxb,
xxh bit allocation . . . . . . . . . . . . . . . . . . . . . . . 65
Table 110. PreSet27 register bit descriptions . . . . . . . . . . 65
Table 111. FIFOLevel register (address: 29h) reset value:
0000 1000b, 08h bit allocation . . . . . . . . . . . . 66
Table 112. FIFOLevel register bit descriptions . . . . . . . . . 66
Table 113. TimerClock register (address: 2Ah) reset value:
0000 0111b, 07h bit allocation . . . . . . . . . . . . . 66
Table 114. TimerClock register bit descriptions . . . . . . . . 66
Table 115. TimerControl register (address: 2Bh) reset value:
0000 0110b, 06h bit allocation . . . . . . . . . . . . 67
Table 116. TimerControl register bit descriptions . . . . . . . 67
Table 117. TimerReload register (address: 2Ch) reset value:
0000 1010b, 0Ah bit allocation . . . . . . . . . . . . 67
Table 118. TimerReload register bit descriptions . . . . . . . 67
Table 119. IRQPinConfig register (address: 2Dh) reset value:
0000 0010b, 02h bit allocation . . . . . . . . . . . . 68
Table 120. IRQPinConfig register bit descriptions . . . . . . 68
Table 121. PreSet2E register (address: 2Eh) reset value:
xxxx xxxxb, xxh bit allocation . . . . . . . . . . . . . 68
Table 122. PreSet2F register (address: 2Fh) reset value:
xxxx xxxxb, xxh bit allocation . . . . . . . . . . . . . 68
Table 123. Reserved registers (address: 31h, 32h, 33h, 34h,
35h, 36h, 37h) reset value: xxxx xxxxb, xxh bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 124. Reserved register (address: 39h) reset value:
xxxx xxxxb, xxh bit allocation . . . . . . . . . . . . . 69
Table 125. TestAnaSelect register (address: 3Ah) reset
value: 0000 0000b, 00h bit allocation . . . . . . . 69
Table 126. TestAnaSelect bit descriptions . . . . . . . . . . . . 69
Table 127. Reserved register (address: 3Bh) reset value:
xxxx xxxxb, xxh bit allocation . . . . . . . . . . . . . 70
Table 128. Reserved register (address: 3Ch) reset value:
xxxx xxxxb, xxh bit allocation . . . . . . . . . . . . . 70
Table 129. TestDigiSelect register (address: 3Dh) reset
value: xxxx xxxxb, xxh bit allocation . . . . . . . . 70
Table 130. TestDigiSelect register bit descriptions . . . . . 70
Table 131. Reserved register (address: 3Eh, 3Fh) reset
value: xxxx xxxxb, xxh bit allocation . . . . . . . . 71
Table 132. MFRC530 commands overview . . . . . . . . . . . 71
Table 133. StartUp command 3Fh . . . . . . . . . . . . . . . . . . 73
Table 134. Idle command 00h . . . . . . . . . . . . . . . . . . . . . 73
Table 135. Transmit command 1Ah . . . . . . . . . . . . . . . . . 74
Table 136. Transmission of frames of more than
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MFRC53001T/0FE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/IEC 14443 A Reader IC |
| MFRC53001T/0FE,112 | 功能描述:RFID應(yīng)答器 MIFARE HS READER RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE,518 | 功能描述:RFID應(yīng)答器 IC READER 13.56MHZ RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE112 | 制造商:NXP Semiconductors 功能描述:CNTCLESS RC 3.3V ISO14443-A/B |
| MFRC531 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Short Form Specification |
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