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| 型號(hào)： | MDS213CG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | 12-Port 10/100Mbps + 1Gbps Ethernet Switch |
| 中文描述： | DATACOM, LAN SWITCHING CIRCUIT, PBGA456 |
| 封裝： | 35 X 35 MM, 2.33 MM HEIGHT, MS-034, HSBGA-456 |
| 文件頁(yè)數(shù)： | 37/120頁(yè) |
| 文件大?。?/td> | 1678K |
| 代理商： | MDS213CG |
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MDS213
Data Sheet
37
Zarlink Semiconductor Inc.
7.3.2 Resource Management
The HISC can enforce a replacement policy when the number of free data structure for new MAC address entries is
lower than the predefined threshold.
7.3.3 Switching Database Management
One of the major management tasks required of the HISC is to create, delete, and modify MAC address entries
upon requests from the Search Engine or management CPU. Generally, the Search Engine performs the learning
of new MAC addresses identified in the packet streams. For a single MDS213 system, the HISC simply informs the
management CPU regarding the newly learned MAC addresses.
The HISC may also create, delete, or modify the MAC address entries based on the requests from the
management CPU. For a multi-MDS system, the HISC is response for synchronizing the switching databases. In
addition to the MAC address entries, the HISC also maintains the following database information required for
switching:
Create, delete and modify VLAN table in the switching database.
Create, delete and modify MAC VLAN table in the switching database.
Create, delete and modify IP Multicast entries in the switching database.
7.3.4 Send and Receive Frames for Management CPU
The HISC delivers BDPU, SNMP and other frames to and from the management CPU. In unmanaged mode, the
HISC also responds to interrupts destined to the management CPU.
7.3.5 Communication Between HISC and Switching Hardware
High-speed communication channels are required to provide fast message deliveries between the HISC and
switching hardware. Two high-performance FIFOs provide the required communication channels. They are
between the HISC and the Frame Engine, and between the HISC and Search Engine.
7.3.6 Communication Between Search Engine and HISC
The first high-speed FIFO is used by the Search Engine to send messages, management requests or received
packets, to the HISC. Whenever a message is sent to the FIFO, the HISC is notified of the new event. Each
message may contain up to two command codes, processed by the HISC sequentially. The HISC can also request
from the Search Engine to do operations such as search or learn via a HISC I/O interface. After processing the
requests, the Search Engine then sends the response back to the HISC via the FIFO.
7.3.7 Communication Between HISC and Frame Engine
The second high-speed FIFO is used by the HISC for sending data transfer requests to the Frame Engine.
Whenever a packet-forwarding request is received from the management CPU, the HISC forwards the request to
the Frame Engine via the FIFO. To alleviate the workload of the management CPU, certain management packets
can be processed by the HISC, and then forwarded to the Frame Engine for transmission via the FIFO.
7.4 Communication Between Management CPU and HISC
The HISC serves as an intermediary communication channel between the switching hardware and the external
management CPU. There are two communication mechanisms provided for messages exchanged between the
management CPU and HISC.
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