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參數(shù)資料
| 型號(hào)： | MCP9808T-E/MS |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 18/52頁 |
| 文件大?。?/td> | 1085K |
| 描述： | IC TEMP SENSOR DGTL I2C 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部 |
| 感應(yīng)溫度： | -40°C ~ 125°C |
| 精確度： | ±1°C |
| 拓?fù)洌?/td> | ADC（三角積分型），寄存器庫 |
| 輸出類型： | 2 線串行，I²C?/SMBUS? |
| 輸出警報(bào)： | 是 |
| 輸出風(fēng)扇： | 是 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
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MCP9808
DS25095A-page 18
?2011 Microchip Technology Inc.
5.1.1
SENSOR CONFIGURATION
REGISTER (CONFIG)
The MCP9808 has a 16-bit Configuration register
(CONFIG) that allows the user to set various functions for
a robust temperature monitoring system. Bits 10 through
0 are used to select the temperature alert output
hysteresis, device shutdown or Low-Power mode,
temperature boundary and critical temperature lock, and
temperature Alert output enable/disable. In addition, Alert
output condition (output set for T
UPPER
and T
LOWER
temperature boundary or T
CRIT
only), Alert output status
and Alert output polarity and mode (Comparator Output
or Interrupt Output mode) are user-configurable.
The temperature hysteresis bits 10 and 9 can be used
to prevent output chatter when the ambient
temperature gradually changes beyond the
user-specified
temperature
boundary
(see
Section 5.2.2 Temperature Hysteresis (T
HYST
) .
The Continuous Conversion or Shutdown mode is
selected using bit 8. In Shutdown mode, the band gap
temperature sensor circuit stops converting
temperature and the Ambient Temperature register
(T
A
) holds the previous temperature data (see
Section 5.2.1 Shutdown Mode ). Bits 7 and 6 are
used to lock the user-specified boundaries T
UPPER
,
T
LOWER
and T
CRIT
to prevent an accidental rewrite.
The Lock bits are cleared by resetting the power. Bits 5
through 0 are used to configure the temperature Alert
output pin. All functions are described in Register 5-2
(see Section 5.2.3 Alert Output Configuration ).
REGISTER 5-2:
CONFIG: CONFIGURATION REGISTER (?/SPAN> ADDRESS 0000 0001b)
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
T
HYST
SHDN
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R-0
R/W-0
R/W-0
R/W-0
R/W-0
Crit. Lock
Win. Lock
Int. Clear
Alert Stat.
Alert Cnt.
Alert Sel.
Alert Pol.
Alert Mod.
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as 0
-n = Value at POR
1 = Bit is set
0 = Bit is cleared
x = Bit is unknown
bit 15-11
Unimplemented: Read as 0
bit 10-9
T
HYST
: T
UPPER
and T
LOWER
Limit Hysteresis bits
00 = 0癈 (power-up default)
01 = +1.5癈
10 = +3.0癈
11 = +6.0癈
(Refer to Section 5.2.3 Alert Output Configuration .)
This bit can not be altered when either of the Lock bits are set (bit 6 and bit 7).
This bit can be programmed in Shutdown mode.
bit 8
SHDN: Shutdown Mode bit
0 = Continuous conversion (power-up default)
1 = Shutdown (Low-Power mode)
In shutdown, all power-consuming activities are disabled, though all registers can be written to or read.
This bit cannot be set to 1 when either of the Lock bits is set (bit 6 and bit 7). However, it can be
cleared to 0 for continuous conversion while locked (refer to Section 5.2.1 Shutdown Mode ).
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