參數(shù)資料
型號: MCP4011T-503E/SN
廠商: Microchip Technology
文件頁數(shù): 40/54頁
文件大小: 0K
描述: IC DGTL POT 50K 1CH 8SOIC
標準包裝: 3,300
接片: 64
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標準值 150 ppm/°C
存儲器類型: 易失
接口: 2 線串行(芯片選擇,增/減)
電源電壓: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
2006 Microchip Technology Inc.
DS21978C-page 45
MCP4011/2/3/4
8.2
Operational Amplifier
Applications
amplifier circuits that could replace fixed resistors with
the MCP4011/2/3/4 to achieve digitally-adjustable
analog solutions.
Figure 8-4 shows a circuit that allows a non-inverting
amplifier to have its’ offset and gain to be independently
trimmed. The MCP4011 is used along with resistors R1
and R2 to set the offset voltage. The sum of R1 + R2
resistance should be significantly greater (> 100 times)
the resistance value of the MCP4011. This allows each
increment or decrement in the MCP4011 to be a fine
adjustment of the offset voltage. The input voltage of
the op amp (V
IN) should be centered at the op amps V
w
voltage. The gain is adjusted by the MCP4012. If the
resistance value of the MCP4012 is small compared to
the resistance value of R3, then this is a fine adjustment
of the gain. If the resistance value of the MCP4012 is
equal (or large) compared to the resistance value of R3,
then this is a course adjustment of the gain. In general,
trim the course adjustments first and then trim the fine
adjustments.
FIGURE 8-3:
Trimming Offset and Gain in
an Inverting Amplifier.
FIGURE 8-4:
Trimming Offset and Gain in
a Non-Inverting Amplifier.
FIGURE 8-5:
Programmable Filter.
Op Amp
VIN
VOUT
B
A
W
+
MCP4011
R1
R2
B
A
VDD
W
R3
R4
MCP401
1
MCP6001
Op Amp
VIN
VOUT
+
R1
R2
B
A
VDD
W
R3
MCP6291
MCP401
1
MCP4012
AW
V
W
V
DD
Op Amp
VIN
VOUT
B
A
W
+
MCP4011
R1
R2
B
A
VDD
W
MCP4011
R3
R4
fc
1
2
π R
Eq C
-----------------------------
=
Pot1
Pot2
REq
R1 RAB RWB
+
()
R2 RWB
+
() R
w
+
||
=
Thevenin
Equivalent
MCP6021
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