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| 型號： | MCP4011T-503E/SN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 27/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT 50K 1CH 8SOIC |
| 標準包裝： | 3,300 |
| 接片： | 64 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 150 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 2 線串行（芯片選擇，增/減） |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
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2006 Microchip Technology Inc.
DS21978C-page 33
MCP4011/2/3/4
5.2.4
DECREMENT (FOR MCP402X
COMPATIBILITY)
This mode is achieved by initializing the U/D pin to a
low state (VIL) prior to achieving a low state (VIL) on the
CS pin. Subsequent rising edges of the U/D pin
decrement the wiper setting toward terminal B. This is
shown in Figure 5-4.
After the wiper is decremented to the desired position,
the U/D pin should remain high (VIH), and the CS pin
should be forced to VIH to ensure that “unexpected”
transitions on the U/D pin do not cause the wiper
setting to increment. Driving the CS pin to VIH should
occur as soon as possible (within device specifications)
after the last desired increment occurs.
When the device voltage falls below the RAM retention
voltage of the device, the wiper state may be corrupted.
When the device returns to the operating range, the
wiper will be loaded with the default POR wiper setting.
After the CS pin is driven to VIH (from VIL), any other
serial command may immediately be entered.
FIGURE 5-4:
Decrement (For MCP402X Compatibility).
Note:
This command allows compatibility with
the MCP402X family, which supports
updating of the non-volatile wiper setting.
Note:
The wiper value will not underflow. That is,
once the wiper value equals 0x00,
subsequent decrement commands are
ignored.
U/D
CS
Wiper
X-1
X
X-2
X-3
X-4
1
2
3
4
VIH
5
6
VIL
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