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| 型號： | MCP3901A0T-I/ML |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AFE 24BIT 64KSPS 20-QFN |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 位數(shù)： | 24 |
| 通道數(shù)： | 2 |
| 電壓 - 電源，模擬： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，數(shù)字： | 2.7 V ~ 5.5 V |
| 封裝/外殼： | 20-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-QFN（4x4） |
| 包裝： | 帶卷 (TR) |
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PCA2002
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 25 November 2011
11 of 30
NXP Semiconductors
PCA2002
32 kHz watch circuit with programmable output period and pulse width
8.9 Frequency tuning at assembled watch
Figure 7 shows the test set-up for frequency tuning the assembled watch.
8.10 Measurement of the oscillator frequency and the inhibition time
The output of the two measuring states can either be monitored directly at pin RESET or
as a modulation of the supply current (a modulating resistor of 30 k
is connected
between VDD and VSS when the signal at pin RESET is at HIGH-level).
The supply voltage modulation must be followed as shown in Figure 4 in order to
guarantee the correct start-up of the circuit during production and testing.
Measuring states:
State 1; quartz crystal oscillator frequency divided by 1024; state 1 starts with a pulse
to VP and ends with a second pulse to VP
State 2; inhibition time has a value of n 0.122 ms. A signal with the periodicity of
31.25 ms + n
0.122 ms appears at pin RESET and as current modulation at pin V
DD
Fig 7.
Frequency tuning the assembled watch
mgw568
FREQUENCY
COUNTER
PROGRAMMABLE
DC POWER SUPPLY
PC INTERFACE
PC
M
motor
32 kHz
PCA200x
battery
Fig 8.
Output waveform at pin RESET for instruction state 2
mgw355
VDD
VSS
31.25 ms
+ inhibition time
VO(dif)
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