- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10753 > MCP3901A0T-I/ML (Microchip Technology)IC AFE 24BIT 64KSPS 20-QFN PDF資料下載
參數(shù)資料
| 型號： | MCP3901A0T-I/ML |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 25/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AFE 24BIT 64KSPS 20-QFN |
| 標(biāo)準包裝： | 3,300 |
| 位數(shù)： | 24 |
| 通道數(shù)： | 2 |
| 電壓 - 電源，模擬： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，數(shù)字： | 2.7 V ~ 5.5 V |
| 封裝/外殼： | 20-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-QFN（4x4） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁
MCP3901
DS22192D-page 4
2011 Microchip Technology Inc.
Output Data Rate
fD
See Table 4-2
ksps
fD = DRCLK = DMCLK/
OSR = MCLK/
(4 x PRESCALE x OSR)
Analog Input Absolute Voltage
on CH0+, CH0-, CH1+,
CH1- Pins
CHn+
-1
—
+1
V
All analog input
channels, measured to
AGND (Note 7)
Analog Input Leakage Current
AIN
—1
—
nA
—2
—
nA
-40°C < TA < 125°C
Differential Input Voltage Range (CHn+ – CHn-)
—
500/GAIN
mV
Offset Error (Note 2)
VOS
-3
—
+3
mV
Offset Error Drift
—
3
—
V/°C
From -40°C to +125°C
Gain Error (Note 2)
GE
—
-0.4
—
%
G = 1
-2.5
—
+2.5
%
All Gains
Gain Error Drift
—
1
—
ppm/°C
From -40°C to +125°C
Integral Nonlinearity (Note 2)
INL
—
15
—
ppm
GAIN = 1,
DITHER = On
Input Impedance
ZIN
350
—
k
Ω
Proportional to
1/AMCLK
Signal-to-Noise and Distortion
SINAD
89
91
—
dB
OSR = 256,
DITHER = On
78
79
—
dB
Total Harmonic Distortion
THD
—
-104
-102
dB
OSR = 256,
DITHER = On
—-85
-84
dB
Signal-to-Noise Ratio
SNR
89
91
—
dB
OSR = 256,
DITHER = On
80
81
—
dB
Spurious Free Dynamic Range
SFDR
—
109
—
dB
OSR = 256,
DITHER = On
—87
—
dB
Crosstalk (50/60 Hz) (Note 2)
CTALK
—
-133
—
dB
OSR = 256,
DITHER = On
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, AVDD = 4.5 to 5.5V, DVDD = 2.7 to 5.5V; -40°C < TA < +85°C,
MCLK = 4 MHz; PRESCALE = 1; OSR = 64; GAIN = 1; Dithering OFF; VIN = -0.5 dBFS = 333 mVRMS @ 50/60 Hz
Parameters
Symbol
Min
Typical
Max
Units
Conditions
Note 1:
This specification implies that the ADC output is valid over this entire differential range and that there is no
distortion or instability across this input range. Dynamic performance is specified at -0.5 dB below the
maximum signal range, VIN = -0.5 dBFS @ 50/60 Hz = 353 mVRMS, VREF = 2.4V.
2:
See terminology section for definition.
3:
This parameter is established by characterization and not 100% tested.
4:
For these operating currents, the following bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> = 00,
VREFEXT = 0, CLKEXT = 0.
5:
For these operating currents, the following Configuration bit settings apply: SHUTDOWN<1:0> = 11,
VREFEXT = 1, CLKEXT = 1.
6:
Applies to all gains. Offset error is dependant on PGA gain setting (see Figure 2-19 for typical values).
7:
Outside of this range, the ADC accuracy is not specified. An extended input range of ±6V can be applied
continuously to the part with no risk for damage.
8:
For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with
BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz,
AMCLK = MCLK/PRESCALE. When using a crystal, the CLKEXT bit should be equal to ‘0’.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-J6H-MW-F2 | CONVERTER MOD DC/DC 52V 100W |
| VE-J6H-MW-F1 | CONVERTER MOD DC/DC 52V 100W |
| MAX9060EBS+TG45 | IC COMPARATOR SGL LP 4UCSP |
| JBXFD3G10MSSDSR | CONN PLUG 10POS STRAIGHT SOLDER |
| MAX9022AKA+T | IC COMPARATOR DUAL SOT23-8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCP3901A1-I/ML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Two Channel Analog Front End |
| MCP3901A1-I/SS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Two Channel Analog Front End |
| MCP3901A1T-I/ML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Two Channel Analog Front End |
| MCP3901A1T-I/SS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Two Channel Analog Front End |
| MCP3901A2-I/ML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Two Channel Analog Front End |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。