參數(shù)資料
型號(hào): MCM69D618TQ6R
廠商: MOTOROLA INC
元件分類(lèi): DRAM
英文描述: 64K x 18 Bit Synchronous Dual I/O, Dual Address SRAM
中文描述: 64K X 18 DUAL-PORT SRAM, 6 ns, PQFP100
封裝: TQFP-100
文件頁(yè)數(shù): 5/16頁(yè)
文件大?。?/td> 175K
代理商: MCM69D618TQ6R
MCM69F817
13
MOTOROLA FAST SRAM
K
ADSC
ADDRESS
WRITE
A1
A2
ADSC
(INITIATES
BURST WRITE)
CLOCK STOP
(CONTINUE
BURST WRITE)
WAKE UP ADSC
(INITIATES BURST WRITE)
D(A1)
DATA IN
D(A1+1)
D(A2)
DQx
HIGH–Z
ADV
VIH OR VIL FIXED (SEE NOTE)
NOTE: While the clock is stopped, DATA IN must be fixed in a high (VIH) or low (VIL) state to reduce the DC current of the
input buffers. For lowest power operation, all data and address lines should be held in a low (VIL) state and control
lines held in an inactive state.
STOP CLOCK WITH WRITE TIMING
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