參數(shù)資料
型號: MCIMX353DJQ5C
廠商: Freescale Semiconductor
文件頁數(shù): 93/147頁
文件大?。?/td> 0K
描述: MULTIMEDIA PROCESSOR 400-MAPBGA
標準包裝: 90
系列: i.MX35
核心處理器: ARM11
芯體尺寸: 32-位
速度: 532MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,SPI,SSI,UART/USART,USB OTG
外圍設備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 96
程序存儲器類型: ROMless
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.33 V ~ 1.47 V
振蕩器型: 外部
工作溫度: -20°C ~ 70°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 10
Freescale Semiconductor
5
1.3
Block Diagram
Figure 1 is the i.MX35 simplified interface block diagram.
Figure 1. i.MX35 Simplified Interface Block Diagram
2
Functional Description and Application Information
The i.MX35 consists of the following major subsystems:
ARM1136 Platform—AP domain
SDMA Platform and EMI—Shared domain
2.1
Application Processor Domain Overview
The applications processor (AP) and its domain are responsible for running the operating system and
applications software, providing the user interface, and supplying access to integrated and external
peripherals. The AP domain is built around an ARM1136JF-S core with 16-Kbyte instruction and data L1
caches, an MMU, a 128-Kbyte L2 cache, a multiported crossbar switch, and advanced debug and trace
interfaces.
External Memory
Interface (EMI)
Smart
DMA
Peripherals
ARM11
Internal
Memory
DDR2/SDDR
RAM
NOR
Flash/
NAND
Flash
Audio/Power
Management
ARM1136JF-S
ESAI
SPBA
CSPI
UART
Camera
Image
Processing Unit
(IPU)
Platform
Bluetooth
MMC/SDIO
Keypin
VFP
L2 cache
MAX
AIPS (2)
JTAG
LCD Display 2
LCD Display 1
Sensor
External Graphics
Accelerator
Timers
GPT
RTC
GPIO(3)
WDOG
OWIRE
I2C(3)
PWM
KPP
UART(2)
3 FuseBox
PSRAM
or WLAN
SCC
CAN(2)
SPDIF
HS USBOTG
ATA
IIM
CSPI
RTICv3
eSDHC(3)
MSHC
ASRC
AUDMUX
L1 I/D cache
ETM
AVIC
RNGC
EPIT
ECT
IOMUX
FEC
HS USBOTGPHY
HS USBHost
FS USBPHY
SSI
GPIO(3)
ECT
GPU 2D
Connectivity
Access
ARM1136 Platform Peripherals
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