
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
Freescale Semiconductor
115
3.7.19.1
UART RS-232 Serial Mode Timing
3.7.19.1.1
UART Transmit Timing in RS-232 Serial Mode
Figure 85 shows the UART transmit timing in RS-232 serial mode, showing only 8 data bits and 1 stop
bit.
Table 86 describes the timing parameter (UA1) shown in the figure.
Figure 85. UART RS-232 Serial Mode Transmit Timing Diagram
3.7.19.1.2
UART Receive Timing in RS-232 Serial Mode
Figure 86 shows the UART receive timing in RS-232 serial mode, showing only 8 data bits and 1 stop bit.
Table 87 describes the timing parameter (UA2) shown in the figure.
–
Figure 86. UART RS-232 Serial Mode Receive Timing Diagram
Table 86. UART RS-232 Serial Mode Transmit Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA1
Transmit Bit Time
tTbit
1/Fbaud_rate
1 – T
ref_clk
2
1 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
2 T
ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider).
1/Fbaud_rate + Tref_clk
—
Table 87. UART RS-232 Serial Mode Receive Timing Parameters
ID
Parameter
Symbol
Min.
Max.
Units
UA2
Receive bit time1
1 The UART receiver can tolerate 1/(16 × Fbaud_rate) tolerance in each bit. But accumulation tolerance in one frame must not
exceed 3/(16
× Fbaud_rate).
tRbit
1/Fbaud_rate
2 – 1/(16
× Fbaud_rate)
2 F
baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
1/Fbaud_rate + 1/(16
× Fbaud_rate)
—
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
TXD
(output)
Bit 3
Start
Bit
STOP
BIT
Next
Start
Bit
Possible
Parity
Bit
Par Bit
UA1
Bit 1
Bit 2
Bit 0
Bit 4
Bit 5
Bit 6
Bit 7
RXD
(input)
Bit 3
Start
Bit
STOP
BIT
Next
Start
Bit
Possible
Parity
Bit
Par Bit
UA2