MCF547x ColdFire Microprocessor, Rev. 4 Freescale Semi" />
參數(shù)資料
型號: MCF5474ZP266
廠商: Freescale Semiconductor
文件頁數(shù): 3/34頁
文件大?。?/td> 0K
描述: IC MPU 32BIT COLDF 388-PBGA
標(biāo)準(zhǔn)包裝: 40
系列: MCF547x
核心處理器: Coldfire V4E
芯體尺寸: 32-位
速度: 266MHz
連通性: EBI/EMI,以太網(wǎng),I²C,SPI,UART/USART,USB
外圍設(shè)備: DMA,PWM,WDT
輸入/輸出數(shù): 99
程序存儲器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.43 V ~ 1.58 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 388-BBGA
包裝: 托盤
PLL Timing Specifications
MCF547x ColdFire Microprocessor, Rev. 4
Freescale Semiconductor
11
6
PLL Timing Specifications
The specifications in Table 7 are for the CLKIN pin.
Figure 8. Input Clock Timing Diagram
Table 8 shows the supported PLL encodings.
Figure 9 correlates CLKIN, internal bus, and core clock frequencies for the 1x–4x multipliers.
Figure 9. CLKIN, Internal Bus, and Core Clock Ratios
Table 7. Clock Timing Specifications
Num
Characteristic
Min
Max
Units
C1
Cycle time
15.0
40
ns
C2
Rise time (20% of Vdd to 80% of vdd)
2
ns
C3
Fall time (80% of Vdd to 20% of Vdd)
2
ns
C4
Duty cycle (at 50% of Vdd)
40
60
%
Table 8. MCF547x Divide Ratio Encodings
AD[12:8]1
1 All other values of AD[12:8] are reserved.
Clock
Ratio
CLKIN—PCI and FlexBus
Frequency Range (MHz)
Internal XLB, SDRAM Bus,
and PSTCLK Frequency
Range (MHz)
Core Frequency Range
(MHz)
00011
1:2
41.67–66.66
83.33–133.33
166.66–266.66
00101
1:2
25.0–44.42
50.0–88.832
2 DDR memories typically have a minimum speed of 83 MHz. Some vendors specifiy down to 75 MHz. Check with the
memory component specifications to verify.
100.0–177.66
01111
1:4
25.0–33.3
100–133.33
200–266.66
CLKIN
C4
C1
C4
C2
C3
25
50
70
80
100 120 140 160
240 260
60
25.0
CLKIN (MHz)
Core Clock (MHz)
66.66
200.0
50
70
90
110
30
Internal Clock (MHz)
2x
4x
2x
Core Clock
CLKIN
Internal Clock
25.0
33.33
130
180 200 220
50.0
133.33
100.0
133.33
266.66
100.0
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