參數(shù)資料
型號(hào)： MCF5407FT162
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 162 MHz, RISC PROCESSOR, PQFP208
封裝： 28 X 28 MM, 0.50 MM PITCH, PLASTIC, FQFP-208
文件頁(yè)數(shù)： 2/35頁(yè)
文件大小： 441K
代理商： MCF5407FT162
10
MCF5407 Integrated ColdFire Microprocessor Product Brief
MOTOROLA
ColdFire Module Description
CLKIN provides the time base through a programmable prescaler. The UART time scale can also be sourced
from a timer input. Full-duplex, auto-echo loopback, local loopback, and remote loopback modes allow
testing of UART connections. The programmable UARTs can interrupt the CPU on various normal or
error-condition events.
1.3.6
Timer Module
The timer module includes two general-purpose timers, each of which contains a free-running 16-bit timer
for use in any of three modes. One mode captures the timer value with an external event. Another mode
triggers an external signal or interrupts the CPU when the timer reaches a set value, while a third mode
counts external events.
The timer unit has an 8-bit prescaler that allows programming of the clock input frequency, which is derived
from the system bus cycle or an external clock input pin (TIN). The programmable timer-output pin
generates either an active-low pulse or toggles the output.
1.3.7
I2C Module
The I2C interface is a two-wire, bidirectional serial bus used for quick data exchanges between devices. The
I2C minimizes the interconnection between devices in the end system and is best suited for applications that
need occasional bursts of rapid communication over short distances among several devices. The I2C can
operate in master, slave or multiple-master modes.
1.3.8
System Interface
The MCF5407 processor provides a direct interface to 8-, 16-, and 32-bit FLASH, SRAM, ROM, and
peripheral devices through the use of fully-programmable chip selects and write enables. Support for burst
ROMs is also included. Through the on-chip PLL, users can input a slower clock (25 to 54 MHz) that is
internally multiplied to create the faster processor clock (100 to 162 MHz).
1.3.8.1
External Bus Interface
The bus interface controller transfers information between the ColdFire core or DMA, and memory,
peripherals, or other devices on the external bus. The external bus interface provides up to 32 bits of address
bus space, a 32-bit data bus, and all associated control signals. This interface implements an extended
synchronous protocol that supports bursting operations.
Simple two-wire request/acknowledge bus arbitration between the MCF5407 processor and another bus
master, such as an external DMA device, is glueless with arbitration logic internal to the MCF5407
processor. Multiple-master arbitration is also available with some simple external arbitration logic.
1.3.8.2
Chip Selects
Eight fully-programmable chip select outputs support the use of external memory and peripheral circuits
with user-defined wait-state insertion. These signals interface to 8-, 16-, or 32-bit ports. The base address,
access permissions, and internal bus transfer terminations are programmable with configuration registers for
each chip select. CS0 also provides global chip select functionality of boot ROM upon reset for initializing
the MCF5407.
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