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參數(shù)資料
| 型號(hào)： | MC8641DVU1333JE |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 18/130頁 |
| 文件大小： | 0K |
| 描述： | IC MPU DUAL CORE E600 1023FCCBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC86xx |
| 處理器類型： | 32-位 MPC86xx PowerPC |
| 速度： | 1.333GHz |
| 電壓： | 1.05V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 1023-BCBGA，F(xiàn)CCBGA |
| 供應(yīng)商設(shè)備封裝： | 1023-FCCBGA（33x33） |
| 包裝： | 托盤 |
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
114
Freescale Semiconductor
Thermal
example, assuming a Ti of 30 C, a Tr of 5 C, a package RθJC = 0.1, and a typical power consumption
(Pd) of 43.4 W, the following expression for Tj is obtained:
Die-junction temperature:
Tj = 30 C + 5 C + (0.1 C/W + 0.2 C/W + θsa) × 43.4 W
For this example, a Rθsavalue of 1.32 C/W or less is required to maintain the die junction temperature
below the maximum value of Table 2.
Though the die junction-to-ambient and the heat sink-to-ambient thermal resistances are a common
figure-of-merit used for comparing the thermal performance of various microelectronic packaging
technologies, one should exercise caution when only using this metric in determining thermal management
because no single parameter can adequately describe three-dimensional heat flow. The final die-junction
operating temperature is not only a function of the component-level thermal resistance, but the
system-level design and its operating conditions. In addition to the component's power consumption, a
number of factors affect the final operating die-junction temperature—airflow, board population (local
heat flux of adjacent components), heat sink efficiency, heat sink placement, next-level interconnect
technology, system air temperature rise, altitude, and so on.
Due to the complexity and variety of system-level boundary conditions for today's microelectronic
equipment, the combined effects of the heat transfer mechanisms (radiation, convection, and conduction)
may vary widely. For these reasons, we recommend using conjugate heat transfer models for the board as
well as system-level designs.
For system thermal modeling, the MPC8641 thermal model is shown in Figure 62. Four cuboids are used
to represent this device. The die is modeled as 12.4x15.3 mm at a thickness of 0.86 mm. See Section 3,
“Power Characteristics” for power dissipation details. The substrate is modeled as a single block
33x33x1.2 mm with orthotropic conductivity: 13.5 W/(m K) in the xy-plane and 5.3 W/(m K) in the
z-direction. The die is centered on the substrate. The bump/underfill layer is modeled as a collapsed
thermal resistance between the die and substrate with a conductivity of 5.3 W/(m K) in the thickness
dimension of 0.07 mm. Because the bump/underfill is modeled with zero physical dimension (collapsed
height), the die thickness was slightly enlarged to provide the correct height. The C5 solder layer is
modeled as a cuboid with dimensions 33x33x0.4 mm and orthotropic thermal conductivity of 0.034 W/(m
K) in the xy-plane and 9.6 W/(m K) in the z-direction. An LGA solder layer would be modeled as a
collapsed thermal resistance with thermal conductivity of 9.6W/(m K) and an effective height of 0.1 mm.
The thermal model uses approximate dimensions to reduce grid. Please refer to the case outline for actual
dimensions.
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| MC8641DVU1333K | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
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