參數(shù)資料
型號: MC74VHC393M
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Dual 4-Bit Binary Ripple Counter
中文描述: AHC/VHC SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14
封裝: EIAJ, SOIC-14
文件頁數(shù): 1/8頁
文件大?。?/td> 172K
代理商: MC74VHC393M
SEMICONDUCTOR TECHNICAL DATA
1
REV 0
Motorola, Inc. 1997
6/97
The MC74VHC393 is an advanced high speed CMOS dual 4–bit binary
ripple counter fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
This device consists of two independent 4–bit binary ripple counters with
parallel outputs from each counter stage. A
÷
256 counter can be obtained by
cascading the two binary counters.
Internal flip–flops are triggered by high–to–low transitions of the clock
input. Reset for the counters is asynchronous and active–high. State
changes of the Q outputs do not occur simultaneously because of internal
ripple delays. Therefore, decoded output signals are subject to decoding
spikes and should not be used as clocks or as strobes except when gated
with the Clock of the VHC393.
The inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
High Speed: fmax = 170MHz (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4
μ
A (Max) at TA = 25
°
C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 236 FETs or 59 Equivalent Gates
LOGIC DIAGRAM
nQA
nQB
nQC
nQD
CPn
RDn
1, 13
2, 12
3, 11
4, 10
5, 9
6, 8
BINARY
COUNTER
FUNCTION TABLE
Inputs
Clock
X
H
L
Reset
H
L
L
L
L
Outputs
L
No Change
No Change
No Change
Next State
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
ORDERING INFORMATION
MC74VHCXXXD
MC74VHCXXXDT
MC74VHCXXXM
SOIC
TSSOP
SOIC EIAJ
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
PIN ASSIGNMENT
11
12
13
14
8
9
10
5
4
3
2
1
7
6
2QB
2QA
RD2
CP2
VCC
2QD
2QC
1QB
1QA
RD1
CP1
GND
1QC
1QD
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