參數(shù)資料
型號(hào): MC68HC711D3CFN2
廠商: Freescale Semiconductor
文件頁數(shù): 39/124頁
文件大?。?/td> 0K
描述: IC MCU 2MHZ 4K OTP 44-PLCC
標(biāo)準(zhǔn)包裝: 26
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 2MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 26
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 192 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
CENTRAL PROCESSING UNIT
TECHNICAL DATA
3-1
SECTION 3
CENTRAL PROCESSING UNIT
This section presents information on M68HC11 central processing unit (CPU) archi-
tecture, data types, addressing modes, the instruction set, and special operations,
such as subroutine calls and interrupts.
The CPU is designed to treat all peripheral, I/O, and memory locations identically as
addresses in the 64 Kbyte memory map. This is referred to as memory-mapped I/O.
There are no special instructions for I/O that are separate from those used for memory.
This architecture also allows accessing an operand from an external memory location
with no execution-time penalty.
3.1 CPU Registers
M68HC11 CPU registers are an integral part of the CPU and are not addressed as if
they were memory locations. The seven registers, discussed in the following para-
graphs, are shown in Figure 3-1.
Figure 3-1 Programming Model
8-BIT ACCUMULATORS A & B
70
15
0
AB
D
IX
IY
SP
PC
70
C
V
Z
N
I
H
X
S
OR 16-BIT DOUBLE ACCUMULATOR D
INDEX REGISTER X
INDEX REGISTER Y
STACK POINTER
PROGRAM COUNTER
CARRY/BORROW FROM MSB
OVERFLOW
ZERO
NEGATIVE
I-INTERRUPT MASK
HALF CARRY (FROM BIT 3)
X-INTERRUPT MASK
STOP DISABLE
CONDITION CODES
HC11 PROG MODEL
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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