參數(shù)資料
型號: MC68HC705P6ACDW
廠商: Freescale Semiconductor
文件頁數(shù): 15/98頁
文件大?。?/td> 0K
描述: IC MCU 2.1MHZ 4.5K OTP 28-SOIC
標(biāo)準(zhǔn)包裝: 26
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SIO
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 21
程序存儲器容量: 4.5KB(4.5K x 8)
程序存儲器類型: OTP
RAM 容量: 176 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 管件
Memory
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
22
Freescale Semiconductor
Addr.
Register Name
Bit 7
654
321
Bit 0
$0000
Port A Data Register
(PORTA)
Read:
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Write:
Reset:
Unaffected by reset
$0001
Port B Data Register
(PORTB)
Read:
PB7
PB6
PB5
0
0000
Write:
Reset:
Unaffected by reset
$0002
Port C Data Register
(PORTC)
Read:
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Write:
Reset:
Unaffected by reset
$0003
Port D Data Register
(PORTD)
Read:
PD7
0
PD5
1
0000
Write:
Reset:
Unaffected by reset
$0004
Port A Data Direction
Register (DDRA)
Read:
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
Write:
Reset:
0000
$0005
Port B Data Direction
Register (DDRB)
Read:
DDRB7
DDRB6
DDRB5
1
1111
Write:
Reset:
0000
$0006
Port C Data Direction
Register (DDRC)
Read:
DDRC7
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Write:
Reset:
0000
$0007
Port D Data Direction
Register (DDRD)
Read:
0
DDRD5
0
0000
Write:
Reset:
0000
$0008
Unimplemented
$0009
Unimplemented
$000A
SIOP Control Register
(SCR)
Read:
0
SPE
0
MSTR
0000
Write:
Reset:
0000
$000B
SIOP Status Register
(SSR)
Read:
SPIF
DCOL
0
0000
Write:
Reset:
0000
$000C
SIOP Data Register
(SDR)
Read:
SDR7
SDR6
SDR5
SDR4
SDR3
SSDR2
SDR1
SDR0
Write:
Reset:
Unaffected by reset
= Unimplemented
R
= Reserved
U = Undetermined
Figure 2-3. I/O and Control Register Summary (Sheet 1 of 3)
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