參數(shù)資料
型號： MC68HC705L1B
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝： SDIP-56
文件頁數(shù)： 56/102頁
文件大?。?/td> 632K
代理商： MC68HC705L1B
MC68HC05L1
MOTOROLA
7-3
LIQUID CRYSTAL DISPLAY DRIVER
7
The operating mode and ON/FF of the LCD is controlled by the General Control register at $0A.
DON - Display On
1 (set)
–
LCD is on.
0 (clear) –
LCD is off.
INT, MS - Multiplex Ratio
These two bits select the multiplex ratio to be either 3 or 4 backplanes.
It is recommended that the DON bit in the General Control register is not set (to activate the
display) until the multiplex rate is selected, to inhibit the LCD drivers. The voltage levels required
for the different multiplex rates are generated internally by a resistive divider chain between VLCD
and VSS. When DON is set, the display is switched on and the resistive divider chain activated with
a maximum voltage, VLCD, and a minimum, VSS. VLCD allows specic voltage thresholds to be
applied to the LCD and can be any voltage up to VDD. Figure 7-2 shows the resistive divider;
values for R1, R2, and R3 can be found in Section 11.4.
7.3
Timing Signals and LCD Voltage Waveforms
Since only one oscillator (crystal or RC) is used for both the MCU and LCD driver and frame
frequency of LCD driver is 62.5Hz, a prescaler is used to divide the internal clock for LCD display
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
General Control Register
$000A
INTO
TE2
TE1
DON
INT
MS
0000 0000
Table 7-2 Multiplex Ratio/Backplane Selection
INT
MS
MULTIPLEX RATIO
UNUSED PINS TO BE
GROUNDED
0
4x16
–
0
1
3x16
VBP3
1
0
4x12
VSEG12-VSEG15
1
3x12
VBP3, VSEG12-VSEG15
TPG
55
相關PDF資料
PDF描述
MC68HC05L1FU 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP64
MC68HC05L1B 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
MC68HC705L2B 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP42
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相關代理商/技術參數(shù)
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