參數(shù)資料
型號: MC68HC11K1
廠商: Motorola, Inc.
元件分類: 8位微控制器
英文描述: 8-Bit Microcontroller(8位微控制器)
中文描述: 8位微控制器(8位微控制器)
文件頁數(shù): 8/20頁
文件大?。?/td> 286K
代理商: MC68HC11K1
MOTOROLA
8
AN1242/D
THE CONVERSION PROCESS
Converting a single-chip M68HC11 application to a two chip system consisting of a non-multiplexed bus
M68HC11 and a PSD4XX or PSD5XX is a five step process:
1. Assess the memory, I/O, and logic requirements of the combined system
2. Select the appropriate M68HC11 and PSD combination.
3. Produce the two chip system memory map.
4. Determine which PSD I/O ports replace M68HC11 I/O ports used for expanded mode operation.
5. Generate a schematic for the combined system.
1. Assess The Memory, I/O, And Logic Requirements Of The Combined System
This step has already been discussed. Key determinations to be made in this step include:
How much I/O is required for the combined application
— Consider single-chip usage and any additional I/O that will be necessary for current and/or future
product enhancements.
How much memory is required for the combined application
— Consider potential firmware enhancements and the possibility of source code migration from as-
sembly language to a high-level language like C or a visual application builder.
— Also consider additional RAM requirements. PSD4XX and PSD5XX devices provide 2K x 8 of
SRAM that can be powered from backup batteries, and future derivatives may eliminate the SRAM
to reduce cost. If even more RAM is necessary, the PSD can provide the decode logic needed to
memory map larger devices.
How much logic will be required
— Any conversion to a two chip solution will use at least some of the PSD decode logic for memory,
I/O port, and control register mapping. If the existing single-chip system uses PALs or 74HC family
logic, consider using the PSD to replace as much of this as possible. The lower chip count reduces
cost and use of the PSDsilos III simulation software can reduce system debug time.
2. Select The Appropriate M68HC11 And PSD Combination
Choose the M68HC11 and PSD combination carefully.
When compatibility between the single-chip M68HC11 system and its PSD-based expanded mode
counterpart is essential, use a ROM-less version of the single-chip MCU. In the example application,
an MC68HC11K1 or an MC68HC11K0 can be paired with the PSD412A1 to replace the
MC68HC711K4.
In applications where maximum compatibility is not required, carefully selecting the M68HC11 MCU
and PSD can realize considerable cost savings.
— If the M68HC11 device is used because it has a large EPROM array, consider replacing it with a
smaller ROM-less derivative. The PSD can be chosen to maximize available EPROM and I/O.
— If the M68HC11 device is used to provide large amounts of I/O, choose the nearest equivalent
ROM-less version and a PSD that will maximize available I/O.
— If the M68HC11 device is used for high-speed execution, consider using a smaller ROM-less de-
rivative capable of the same performance. The PSD can be chosen to maximize available EPROM
and I/O.
— If the M68HC11 device is used because it has a specific on-chip peripheral complement, choose
the nearest equivalent ROM-less version and PSD that approximate the functionality of the single-
chip device.
Selection of an appropriate PSD is relatively straightforward. The device must meet the memory, I/O,
and logic requirements determined in Step 1. If necessary, the MCU can be chosen to augment PSD
resources, such as I/O and logic used for chip selects.
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